2021-06-29 16:00
ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion
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a1batross >
I had the same on BSP kernel. Haven't figured out, moved to mainline instead.
00:04
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a1batross >
montjoie, good news, rk_crypto2 has loaded and successfully registered all algos
00:05
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naoki >
ah, I'm using 6.0-rc7 (+ pcie3 patches)
00:06
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naoki >
rtl8125b@pcie3x2 works but rtl8125b@pcie2x1 doesn't work yet ;)
00:07
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a1batross >
oh... that's good
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a1batross >
since you're also 6.0-rc7, you haven't had weird sd card issues? One was timing out and all of them cause CRC error in ext4
00:08
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a1batross >
since you're also on 6.0-rc7, you haven't had weird sd card issues? One was timing out and all of them cause CRC error in ext4
00:10
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naoki >
mmc_host mmc0: Bus speed (slot 0) = 375000Hz (slot req 375000Hz, actual 375000HZ div = 0)
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naoki >
dwmmc_rockchip fe2b0000.mmc: All phases bad!
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naoki >
mmc0: tuning execution failed: -5
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naoki >
I didn't get CRC error yet
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a1batross >
[ 1.771552] mmc_host mmc0: Bus speed (slot 0) = 375000Hz (slot req 400000Hz, actual 375000HZ div = 0)
00:14
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a1batross >
[ 1.850516] mmc_host mmc0: Bus speed (slot 0) = 150000000Hz (slot req 150000000Hz, actual 150000000HZ div = 0)
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a1batross >
[ 2.140442] dwmmc_rockchip fe2b0000.mmc: Successfully tuned phase to 229
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a1batross >
:think:
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naoki >
currently it's booting from uSD. I may try boot from eMMC
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a1batross >
i haven't even tried emmc, it's only sd cards. What is that clock? idk
00:17
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a1batross >
btw I'm on same compute module with rk3568, based my dts from rock3a's
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naoki >
I cannot remember what is based ;)
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a1batross >
compute module dtsi isn't separated yet
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06:36
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montjoie >
a1batross: great thanks for the test, could you share the dmesg and output of /sys/kernel/debug/rk3588_crypto/stats ?
06:38
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montjoie >
a1batross: sorry for the compile error, I enbaled all CRYPTO by default and dont see the diff between CONFIG_SM3 and CONFIG_SM3_GENERIC (will fix it)
06:38
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montjoie >
a1batross: I wish to know also on which board you tested it
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