narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - official channel moved from Freenode - publicly logged on https://libera.irclog.whitequark.org/linux-amlogic
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<montjoie> xdarklight: I started building your changes and I found another tester
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<montjoie> I will deploy in my lab and if no problem is found, it will be time to think abot sending v7. I will add you on credits of driver
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<montjoie> xdarklight: got some ch348 ttyUSB10: Failed to wait for TX buffer flush
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<montjoie> reproductible problem port 6 to 7 9600baud
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<narmstrong> minute: nice! what panel do you use ? I'm still puzzeled about why do we need specific timings for the amlogic socs, I can't explain it
<narmstrong> minute: check the HSYNC/VSYNC polarity, it could explain the wrap
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<montjoie> xdarklight: please join #ch348 since we are offtopic here
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<minute> narmstrong: panel is jdi lt070me05000
<narmstrong> minute: ok the nexus7 panel^^, do you have the datasheet of the panel? do they precise timings and sync polarities somehow ?
<minute> narmstrong: yes, it's a pretty well known panel. it works fine with the same mode on imx8mplus, but we have some patches on top of your dsi work for the big reform panel, maybe they cause the issues
<minute> it's still unclear how to upstream those little dsi tweaks
<minute> for example VIU_OSD_HOLD_FIFO_LINES (but i think that was to prevent flicker?)
<minute> and PHY_STOP_WAIT_TIME
<minute> hmm also i had to tune vsync start/end for the big panel
<narmstrong> for the VIU_OSD_HOLD_FIFO_LINES it should be make dynamically, then dsi is enabled it should be updated
<minute> narmstrong: i had the same hunch about sync yesterday and undid that patch, but maybe i was too tired and messed sth up. will retry today
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<minute> observation: setting DRM_MODE_FLAG_PHSYNC or DRM_MODE_FLAG_NHSYNC in the panels mode doesn't change anything.
<minute> narmstrong: display datasheet (it says another model number in this datasheet but it is the same display) https://source.mnt.re/reform/pocket-reform/-/blob/deb1b816ceaf6f81fc2291f6ea9bd55466bfe204/displays/LT070ME05000-20180725150311738.pdf
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<minute> narmstrong: ok, fixed it. i had to disable DSI burst mode
<minute> (but on imx8mplus it works only with burst mode...)
<minute> ok cool, now i just need to fix a little bit of vertical offset, this looks similar to the previous panel
<minute> aha, this is caused by VIU_OSD_HOLD_FIFO_LINES
<minute> if i change it back to 4 (instead of 31), the offset is much smaller
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<narmstrong> I suspect burst requires some extra bit clk margin as amlogic does, something like that should work https://www.irccloud.com/pastebin/BctDfCSn
<minute> narmstrong: aha, i can try that!
<minute> narmstrong: but more pressing: how to get rid of the vertical offset that VIU_OSD_HOLD_FIFO_LINES causes?
<minute> i have it down to 1 pixel now by setting it to VIU_OSD_HOLD_FIFO_LINES(0)... 0 and 1 kinda look the same
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<minute> narmstrong: i was able to get rid of that last line by shifting the vsync start by 1 line in the mode definition, luckily the panel tolerates that
<minute> narmstrong: would it make sense to be able to configure the fifo lines in dtb?
<narmstrong> minute: not really, it should be set dynamically by the HDMI or DSI driver instead
<minute> narmstrong: aha! and how could i then influence this on a per device basis?
<minute> afaik for one device we need 31, for this one 0
<narmstrong> hmm, I don't think 0 is safe, amlogic sets 4 here because it let's some margin to react to plane update on vsync irq
<narmstrong> another parameter must be wrong here because VIU_OSD_HOLD_FIFO_LINES should not inpact the start of the display
<narmstrong> or at least not enough
<minute> i'm wondering if vsync works at all
<minute> well, obviously it does, if i can shift the display by one line ^^
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