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<tanure>
If anyone from Amlogic could help , it seems that meson-axg-mmc is diferent in T7, where the mux clock must be get from DTS not created in the driver
<xdarklight>
tanure: that seems possible, IIRC the PWM clock mux was also moved to the clock controller registers (previously it was part of the PWM controller registers). what's the question?
<tanure>
is there any upstream version of this driver
<tanure>
the downstream driver fails to get some clocks , but at the end works
<tanure>
so I am not sure whats the correct thing to do
<tanure>
also how come meson-axg-mmc have 2 diferent ways to behave ?
<tanure>
The most important question is : Will the upstream driver for "amlogic,meson-axg-mmc" work without changes for T7 ?
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<xdarklight>
tanure: so whether Amlogic has any upstream patches for the T7 SD/EMMC IP in the works is something only they know about - in the past it's been (mostly) up to the community to understand the vendor driver and then write/adapt the upstream driver