<CounterPillow>
xdarklight: thank you for working on the ch348 driver, I have some ch348 boards I made (and did find that the proposed mainline driver didn't block on full buffer) so the issue getting attention from someone is fantastic to see :)
<CounterPillow>
Let me know if I can help out in some way, I still have all the boards around
<xdarklight>
CounterPillow: ah, you're here as well :-) maybe you can give https://github.com/xdarklight/ch348 a try on your board. I'm unable to reproduce the instability that I saw yesterday anymore (I've been testing with montjoie's python script so far and the 2048 byte case was the one that gave me trouble)
<f_>
minute: yes, work led by LucasTanure
<f_>
IIRC it boots now
<rockosov>
narmstrong: Hello Neil,
<rockosov>
Hope you are doing well. Our current focus involves the development of Amlogic bootloader write operations within the Linux kernel and U-Boot for the rawnand meson driver. This involves a unique format for storing bootloader copies using "info_pages". The primary architectural challenge lies in the fact that "info_pages" are written using SCRAMBLING MODE and a special 384-bit ECC SHORT MODE.
<rockosov>
We find ourselves confused regarding the implementation of this in the upstream driver. While it's true that Amlogic combines data format and NAND driver, we are unable to ignore it as the BootROM expects to encounter this specific data format for the bootloader.
<rockosov>
Do you have any suggestions or ideas that we could explore in addressing this issue? Appreciate any help on that...
<rockosov>
We tried to think about separate nandchips for bootloader partition and other partitions, but it doesn't work, because only info_pages (a part of bootloader partition) are written using such special modes..
<rockosov>
Ahhh, I see. You suggest to create two nand chips, the first one with boot_medium for bootloaders things and the second one for the general partitions..
<rockosov>
And implement boot_medium mode with the special ECC and SCRAMBLING handling
<xdarklight>
rockosov: I haven't done much with NAND drivers yet (and most things I have attempted didn't work). so I'm just saying that the rockchip driver does something special for the bootloader ;-) from what I've seen in the past the NAND maintainers are helpful, so I think it's worth checking with them
<rockosov>
xdarklight: Thanks a lot for this flag, we will try to figure out deeper! Do you know any IRC channel with nand core team?
<xdarklight>
rockosov: and you're welcome - it's always great to see things being upstreamed :)
<rockosov>
Sure, more strong upstream solutions = better firmare quality for production devices! :-)
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<narmstrong>
too late, but thx xdarklight for the hint!
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<xdarklight>
montjoie: I pushed an update to https://github.com/xdarklight/ch348 earlier (now with more documentation and history cleaned up). I'm using your python script for testing and ALL tests are now passing, even with: BAUDS = [50, 75, 110, 150, 200, 300, 600, 1200, 1800, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400, 921600, 1500000, 2000000, 6000000, 12000000]
<xdarklight>
CounterPillow: I also ran your test tool for a little bit. it reports 0.000% error rate - which I assume is good :)
<CounterPillow>
\o/
<xdarklight>
narmstrong: I need to test on the Le Potato board in the next days but I got a report of display output not working on the 32-bit SoCs if the board enables the CVBS output. the kernel log shows "Failed to find CVBS Connector bridge" and then doesn't even initialize HDMI. this is just a heads up to let you know that there may be issues on boards with CVBS output enabled (those without CVBS output may be fine) - or if the 64-bit SoCs are fine that
<xdarklight>
I did something wrong
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