<gundy9558[m]>
Re: outputs high during FPGA reset, would it be possible for someone to build a hat-like interceptor device that borrows/ steals one of the outputs and uses that to drive tri-state buffers that the other outputs get routed through? Might be a bit hokey, but could be produced as an add-on for those who are bothered enough about it? (The VIO shutdown approach seems fine for what I'd be doing I think, just spitballing)..
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