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<
f_ridge >
<x2x6_/D> having this as register values and 1000 as result of PLLC PER frequency, what do we get for emmc freq?
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<
f_ridge >
<GitHub Lines/D> ```h
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<
f_ridge >
<GitHub Lines/D> #define CM_EMMCDIV_DIV_BITS 15:4
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<
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<GitHub Lines/D> #define CM_EMMCDIV_DIV_SET 0x0000fff0
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<
f_ridge >
<GitHub Lines/D> ```
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<
f_ridge >
<clever___/D> this says that the divisor is stored in bits 4-15
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<
f_ridge >
<clever___/D> so we take your `00005000` and turn it into `0x500`
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<
f_ridge >
<x2x6_/D> yes, that I did , so we divide 1000 by 1280
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<
f_ridge >
<clever___/D> then linux says that its a 4.8bit fixed-point int
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<
f_ridge >
<clever___/D> so that 5 is the integer part, and the `00` is the fractional part
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<
f_ridge >
<clever___/D> you can also use `0x500 / 256` to convert to floating point, which gives you plain old `5`
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<
f_ridge >
<clever___/D> so now its `1000/5`
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f_ridge >
<x2x6_/D> Ahh, ok
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<
f_ridge >
<x2x6_/D> So its 250 MHz
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<
f_ridge >
<clever___/D> ```
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<
f_ridge >
<clever___/D> > 1000/5
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<
f_ridge >
<clever___/D> 200
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<
f_ridge >
<clever___/D> ```
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<
f_ridge >
<x2x6_/D> So its 200(edited)
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<
f_ridge >
<x2x6_/D> Yes.
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f_ridge >
<x2x6_/D> At least I saw this clock with my own eyes and now believe in clock)
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f_ridge >
<GitHub Lines/D> ```c
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<GitHub Lines/D> int measure_clock(int mux) {
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<GitHub Lines/D> int divisor = 1000;
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<
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<GitHub Lines/D> *REG32(CM_TCNTCTL) = CM_PASSWORD | CM_KILL;
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<
f_ridge >
<GitHub Lines/D> *REG32(CM_TCNTCTL) = CM_PASSWORD | (mux & CM_SRC_MASK) | (mux >> CM_SRC_BITS) << CM_TCNT_SRC1_SHIFT;
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<GitHub Lines/D> *REG32(CM_OSCCOUNT) = CM_PASSWORD | (xtal_freq / divisor);
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<
f_ridge >
<GitHub Lines/D> udelay(1);
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<
f_ridge >
<GitHub Lines/D> while (*REG32(CM_OSCCOUNT)) {
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<
f_ridge >
<GitHub Lines/D> }
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<
f_ridge >
<GitHub Lines/D> while (*REG32(CM_TCNTCTL) & CM_BUSY) {
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<
f_ridge >
<GitHub Lines/D> }
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<
f_ridge >
<GitHub Lines/D> int count = *REG32(CM_TCNTCNT);
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<
f_ridge >
<GitHub Lines/D> *REG32(CM_TCNTCNT) = CM_PASSWORD | 0;
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<
f_ridge >
<GitHub Lines/D> return count * divisor;
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<
f_ridge >
<GitHub Lines/D> }
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<
f_ridge >
<GitHub Lines/D> ```
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<
f_ridge >
<clever___/D> another thing that can be handy, is this function
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<
f_ridge >
<clever___/D> basically, you can create a delay that will last for X clock cycles of the 19.2mhz crystal
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<
f_ridge >
<clever___/D> and while doing that delay, you can count how many clock cycles occured on an arbitrary clock
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<
f_ridge >
<clever___/D> it has a ~32 way input mux, to select nearly any clock in the system
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<
f_ridge >
<clever___/D> with a bit of math, you can then find the ratio between the 19.2mhz clock and the measured clock, and then work out what rate its at
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f_ridge >
<x2x6_/D> nice
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f_ridge >
<x2x6_/D> That's already pretty internal)
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f_ridge >
<x2x6_/D> I have to sleep before work, see you later)
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<
f_ridge >
<clever___/D> later
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