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<x2x6_/D> Hi, clever. So the problem is not that I can not understand arguments or the output - problem Is I can not receive 512 block at all
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<x2x6_/D> I have some CRC errors in the interrupt or status register instead
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<x2x6_/D> And that's even without seeting bin 31. Ony the check part. So I am not doing any kind of function chang
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<x2x6_/D> And that's even without seeting bin 31. Ony the check part. So I am not doing any kind of function change(edited)
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<x2x6_/D> I think BCM2835 emmc controller is just not capable to process this command for some reason
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<x2x6_/D> when I send cmd6 , i receive CMD done, DATA CRC err
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<x2x6_/D> when I send cmd6 , i read interrupt register value as CMD_DON | ERR | DATA_CRC_ERR(edited)
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<f_ridge>
<clever___/D> @x2x6_ does it give an R1 response?
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<x2x6_/D> Yes, its 900
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<clever___/D> @x2x6_ does emmc require you to program in the expected block size and block count?
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<f_ridge>
<x2x6_/D> Yep, I do this the same way I program for reads/writes
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<clever___/D> and what byte count do you program it for?
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<clever___/D> that would explain the checksum errors
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<x2x6_/D> You told me this, I've read this, I always saw 512 bits at 512 bytes. I had some "mental overlay".
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<x2x6_/D> Thanks.
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<x2x6_/D> I will try now
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<clever___/D> basically, the SD controller will read `$size` bytes from the DAT pins, then it will expect the checksum to follow
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<clever___/D> so youve configured it to read the full 64 byte reply, then keep reading another 448 bytes of junk (including the true checksum)
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<clever___/D> then it will expect the checksum, where there is none, and that idle bus fails the checksum
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<x2x6_/D> So blocksize should be 64 and num sectors 1