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<f_ridge>
<x2x6_/D> Ok, now we're talking!
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<x2x6_/D> 1. I only use ST_CLO to measure time of writing
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<x2x6_/D> 2. I do not do MMAL parallel activity - just write 2 64 x 512 buffers at emmc speed.
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<x2x6_/D> 3. I have put timestamps more precisely last timestamp is measured on DMA completed IRQ when last data byte lands on the sdcard, previously I checked time when sleeping task woke up after being notified by my kernel.
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<x2x6_/D> 4. I am triyng different values of emmc divisor and actually see different speeds based on divisor value.
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<x2x6_/D> 5. In this screenshot divisor is 0x80 , which is mapped to /256.
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<x2x6_/D> I will show more screens to see the difference with smaller divisors
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<x2x6_/D> So the constant part is some 100ms added on top always. Not sure what that is...
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<clever___/D> let me read the scrollback...
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<clever___/D> there will be 2 things controlling the speed of a write
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<clever___/D> first, is just the raw data transfer, how fast can you get a block from the pi ram to the SD ram, that is controlled by the divisor youve been messing with
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<clever___/D> second, is how long the card takes to write that to flash and send the all-good signal, that can only be improved by getting better cards
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<clever___/D> running `fstrim` on the card from linux can improve the the second one, for some cards
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<x2x6_/D> Just additional thing I've noticed.
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<x2x6_/D> If I put sleeps inbetween two consequtive writes - then the writes themselves are much faster.
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<x2x6_/D> I think this happens because first emmc fifo get pumped by data, then DMA and the waiting code can proceed to the next write IO, they do that and next write might overflow FIFO and then DMA must wait until fifo becomes free by 1 item and so on
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<clever___/D> how does dma work with emmc?
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<clever___/D> and are you using write-multiple?
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<x2x6_/D> I am using multiple writes, so a write command is split by two commands actually - are two CMDXX requests -first one is set CMD23 (SET_NUMBER_OF_BLOCKS) (=64) , next is CMD25 (WRITE_MULTIPLE)
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<x2x6_/D> I am using multiple writes, so a write command is split by two commands actually - first one is set CMD23 (SET_NUMBER_OF_BLOCKS) (=64) , next is CMD25 (WRITE_MULTIPLE)(edited)
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<clever___/D> ah, good
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<clever___/D> i noticed a decent speed improvement, when i switched to read-multiple, and larger fat clusters
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<x2x6_/D> Then CMD25 actually is run with DMA enabled. So EMMC peripheral paces DMA
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<clever___/D> do you tell emmc the dma addr, or do you configure the main soc dma?
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<x2x6_/D> I dont need fstrim actually because I don't use filesystem. I just write to partition - btw - this is a great hint because fat32 has to allocate clusters and do lots of lookups
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<x2x6_/D> of course they are cached as possible but still it cant cache all of it
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<clever___/D> ah, then you might want to try the discard/erase commands