azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
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<agg>
well, i bumped the clock and FF usage up, and after a certain limit the ecp5 just gives up and resets, lol
<agg>
I can do 100% FF at 100MHz no problem, but about 6500 FFs at 400MHz and it only stays alive for about a minute before the 1v1 rail suddenly collapses and it resets?
<agg>
not really sure what's up with the 1v1 supply, nothing on the board's exceeding 40C so shouldn't be thermal, and the current limit is at 2A but it's only drawing 0.8W for the whole board
<agg>
ripple looks fine though so i guess some part of the pdn is ok :P
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