azonenberg changed the topic of ##openfpga to: Open source tools for FPGAs, CPLDs, etc. Silicon RE, bitfile RE, synthesis, place-and-route, and JTAG are all on topic. Channel logs: https://libera.irclog.whitequark.org/~h~openfpga
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<knielsen> ±
<knielsen> oops
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<agg> are there any neat ways to make a bitstream just for the purpose of trying different power consumptions? I'd like to see how good my decoupling is as power draw ramps up, not sure if I should just instantiate an increasing number of flops in a ring or what.
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<vup> agg: maybe this https://github.com/stnolting/fpga_torture with different NUM_CELLS?
<agg> ooh looks interesting, thanks!
<agg> just gotta figure out building vhdl then, heh
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