whitequark changed the topic of #yosys to: Yosys Open SYnthesis Suite: https://github.com/YosysHQ/yosys/ | Channel logs: https://libera.irclog.whitequark.org/yosys/ | Bridged to #yosys:matrix.org
tpb has quit [Remote host closed the connection]
tpb has joined #yosys
MyNetAz has quit [Remote host closed the connection]
MyNetAz has joined #yosys
xutaxkamay_ has joined #yosys
xutaxkamay has quit [Ping timeout: 272 seconds]
xutaxkamay_ has quit [Read error: Connection reset by peer]
xutaxkamay has joined #yosys
<famubu[m]> Hi. I was trying to use nextpnr while targeting a gowin fpga (on a
<famubu[m]> Sipeed Tang Nano 9K).
<famubu[m]> The verilog code is autogenerated by an external tool over which I
<famubu[m]> have no control.
<famubu[m]> But nextpnr finishes its analysis quite fast (even while trying much
<famubu[m]> larger designs).
<famubu[m]> Each time, it finally gives this message: Info: No Fmax available; no interior timing paths found in design.
<famubu[m]> The source verilog is not that understandable but it looks like there
<famubu[m]> are registers involved.
<famubu[m]> Does that mean that I have some misconfiguration?
<famubu[m]> This is the source verilog: https://bpa.st/6P7Q
<tpb> Title: View paste 6P7Q (at bpa.st)
<famubu[m]> And this is the log file generated by the nextpnr-gowin command: https://bpa.st/SGCA
<tpb> Title: View paste SGCA (at bpa.st)
<famubu[m]> This is the constraints file that I'm using: https://bpa.st/EDGQ
<tpb> Title: View paste EDGQ (at bpa.st)
<famubu[m]> The yosys and nextpnr commands that I tried was: https://bpa.st/QNMA
<tpb> Title: View paste QNMA (at bpa.st)
MyNetAz has quit [Write error: Broken pipe]
MyNetAz has joined #yosys
krispaul has joined #yosys
kristianpaul has quit [Ping timeout: 260 seconds]
MyNetAz has quit [Read error: Connection reset by peer]
MyNetAz has joined #yosys
Klotz has joined #yosys
Klotz has quit [Quit: Klotz]
krispaul has quit [Quit: WeeChat 3.5]
kristianpaul has joined #yosys
whitequark[cis] has joined #yosys
<whitequark[cis]> that sounds like maybe a clock isn't connected properly
nonchip has quit [Quit: https://quassel-irc.org - Chat comfortably. Anywhere.]
nonchip_ has joined #yosys