Tartarus changed the topic of #u-boot to: SOURCE MOVED TO https://source.denx.de/u-boot/u-boot.git / U-Boot v2022.04 is OUT / Merge Window is OPEN until 25 April 2022 / Release v2022.07 is scheduled for 4 July 2022 / http://www.denx.de/wiki/U-Boot / Channel archives at https://libera.irclog.whitequark.org/u-boot
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<flyback> <flyback> so turns out qemu at least back in 2008 added a profile for dht-walnut
<flyback> <flyback> so I will be able to partially test netbsd and u-boot without bricking the board
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<vagrantc> https://ftp.denx.de/pub/u-boot/ seems to have multiple links to 2022.04-rc5 ... i'm guessing that's a mistake? at least one of them doesn't seem to have a valid signature
<Tartarus> I typo'd to 2202.04-rc5 first and that might have messed things up
<Tartarus> I re-created and re-uploaded
<vagrantc> ok, well, at least it's a known oddity :)
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<vagrantc> Tartarus: might you consider removing the botched version? ... 2202.04~rc5 isn't due out for quite some time
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<LetoThe2nd> Tartarus: sorry, went AFK yesterday. and yeah, not technically empty, but practically... ;-)
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<Tartarus> LetoThe2nd: Right, so, intentional if odd.
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<ladis> Hmm, afd4f15a39de0fa572792a3037545afbac386ee5 causes infinite reboot loop on igep0020
<LetoThe2nd> Tartarus: such fun :(
<ladis> and clearing DM_FLAG_PRE_RELOC makes it work again. Does it ring a bell?
<marex> ladis: you ran out of early malloc area or some such ?
<ladis> marex: possible. Let me look at u-boot code base after 5 years to see how to debug that :)
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<Pali> Hello! Has somebody knowledge of PowerPC FSL Book-E TLB entries (used by u-boot's mpc85xx platform)?
<Pali> I would like to know if it is correct to set MAS2_I bit (cache inhibit) in TLB entry for SDRAM or for L2/SRAM.
<Pali> Because U-Boot on some places set it and on some other not... which is really suspicious.
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<Pali> I would expect that SDRAM entry should not set cache inhibit bit... but maybe there is reason for it?
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<Tartarus> I think unfortunately there's not many folks from around back then still active in Linux, and certainly not PowerPC
<Tartarus> Slightly curious what you're doing with that P2020 :)
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<Pali> Tartarus: boot OS from NVMe, SATA, SDHC or USB 3.0 storage if kernel is on btrfs partition
<Tartarus> Just for fun? Or some project?
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<Tartarus> I forget if the underlying chips are still available or not, off-hand
<Tartarus> I kinda guess so since NXP didn't drop them a few years back
<Pali> It is for Turris project, the first Turris router https://project.turris.cz/en/hardware ... it is old HW but still powerfull
<Pali> P2020 chips are still available, IIRC NXP has it in its porfolio at least until year 2023
<Tartarus> Ah
<Tartarus> Few more months until 2023 ;)
<Tartarus> But, OK, yeah, understandable where you're coming from now
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<Pali> There are still users and I guess it does not make sense to drop boards which are actively used just because vendor is going to drop support
<Tartarus> You're probably going to be the most active PowerPC person for a while, with the second most being the mpc8xx people since they've got a few years left of support for their platform I think too
* beanbag- has a 405gp and a mpc8248/ep8248e board
<beanbag-> I think both are taken out of u-boot now
<beanbag-> hell linux doesn't even support them fully but netbsd added support for the 405 last year
<Tartarus> Yeah, 4xx support was removed a few years back
<Tartarus> Anything can return, if brought up to modern standards
<Tartarus> Which is also part of the problem with general powerpc
<beanbag-> well I am going to try to build the 4.2013? version cause it's the latest one with a patch for the dht-walnut
<beanbag-> I would feel better if I had a socket for the rom on this board and spare flash chip
<beanbag-> I made a parallel nor flash programmer from a old dvd-rw drive
<beanbag-> by abusing "firmware recovery mode" on the chipset
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<beanbag-> as for the other board no clue what the latest u-boot is but linux still has ep8248e.c in the latest kernel source
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<beanbag-> challange is only 64mb flash so have to find something small or jump to a usb stick
<cambrian_invader> no jtag?
<beanbag-> neat little board, I got if for a steal on ebay, almost fried it with the wrong voltage and the serial cable was miswired and shorted a seral pin designed for power delivery to ground, blowing the trace but it's non essential
<beanbag-> yeah both have jtag but I dunno hwo to use my bus pirate etc
<beanbag-> I think the buck converter on the board saved it from over voltage
<Pali> Well, first time I looked at PowerPC HW was week ago. Not sure how I could be most active person for just one week :-)
<Pali> I was told that JTAG on this mpc platform is PITA (requires NXP CodeWarrior SW or whatever) so I have not tried it.
<beanbag-> ah
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<cambrian_invader> I have been using openocd on layerscape, but it looks like there's no PPC support
<cambrian_invader> apparently http://www.tgi-sci.com/tgi/download/m52.htm exists
<cambrian_invader> ah, looks like the ppc stuff happens in urjtag
<cambrian_invader> although I have never found it pleasant to use
<beanbag-> heh
<beanbag-> wiggler is still supported
<beanbag-> in urjtag
<beanbag-> highly *NOT* recommend
<beanbag-> since it's just bit banging the parallel port pins
<beanbag-> a) need a pc/laptop with a parallel port
<beanbag-> b) 512KB/hr speed
<beanbag-> c) cpu usage 99% due to bit banging
<beanbag-> d) *CANUCKED*
<beanbag-> e) 5v mabye 3.3v with a level shifter, won't be compatible with newer jtag interfaces that use lower voltages
<beanbag-> f) I think a $5 rpi0 can function as a good jtag programmer
<beanbag-> g) rpi pico might even be better due to a very good pio engine
<sakman> Pali: I have all the jtag gear for PPCs (BDIs etc.) but will be away from the boards for some weeks, sent you a follow up e-mail
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<Pali> Well, I do not need JTAG at all... BootROM can load bootloader from SD card and this is the setup which I used during this (short) development
<beanbag-> nice
<Pali> I have also SW+HW for JTAG usage for P2020 but I have not tried it (yet).
<beanbag-> yeah I don't have options like that for these boards
<beanbag-> so I might mod the one board with a socket
<beanbag-> it'
<beanbag-> is a plcc32 so easy to socket and program externally
<beanbag-> but might be easier to just get a pico and setup a a jtag device or my bus pirate
<Pali> sakman, beanbag- back to my question, do you know how to setup correctly TLB entries for SDRAM and L2/SRAM?
<beanbag-> nfc sorry
<beanbag-> someday after I move into my own house, I would like to learn that low level and program
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<sakman> Pali: I am travelling need to look at the RM but here is the (portion of) an jtag init file, if it helps : https://pastebin.com/j49XLTjd (top section if you are only interested in L2SRAM)
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<Pali> sakman: in your file you do not configure TLB entry for L2SRAM
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<sakman> Pali: OK, thanks for the link, will try to look at this little later on
<Pali> thanks!
<Pali> Tartarus: On NXP website about P2020 is written: Last Time Buy Date: 09-Sep-2021; Last Time Delivery Date: 15-Dec-2023. So more than one year it is officialy still alive
<sakman> Pali: I will try to take a deeper look later on but what problem you were seeing with mas_i not being set for the entire range ?
<hurricos> I do OpenWrt ports for a number of P-series QorIQ platforms; dmascord was person I know to really bang their head against jtag on them.
<hurricos> I'm not sure a failure to do much with the P1020 is a good reference for success on the P2020, but ...
<hurricos> I can definitely say +1 that they're powerful platforms :^)
<cambrian_invader> to be expected from pcc
<cambrian_invader> *ppc
<hurricos> Now, if by chance you know anything about
<hurricos> doc/README.ramboot-ppc85xx ....
<hurricos> Or, indeed, anything else I might feed to an old vendor u-boot's `bootm` that would let me formulate a different opinion about partitioning or pre-boot setup, I would be eternally in your debt :^)
<hurricos> as would half of Freifunk, who are using WDR4900 but don't want to binary-patch u-boot to use a different (non-env-variable-coded) boot script.
<hurricos> Give me a ping if you ever get JTAG working, I'll get out my box of bricked P1010 / P1020 boards.
<sakman> hurricos: for that urjtag link, I think it seems it is for boundaryscan (different chain) I don't think there is jtag debug on that code.
<sakman> hurricos: with jtag discussions I think we are getting off-topic here. If you live in US/CAN you can send you board to me and I can unbrick. PM me if it is the case.
<Pali> hurricos: I know about all of these README files, I read them since last week. About JTAG, currently I do not have reason to even try it. SD card booting with UART is enough for debugging. Basically I already have fully working v2021.04 U-Boot on this board (stored SD card). I started sending patches to ML.
<hurricos> Ah, got it. You just need to know about that register issue :^)
<hurricos> Though I do plenty of Linux porting work, I'm definitely out of my depth here, sorry.
<cambrian_invader> (I mentioned jtag because I am using it, but you don't need it if you can just use an SD card)
<hurricos> Glad you have things working ;)
<Pali> hurricos: Yes, I wrote it in that linked email, that u-boot has probably a bug in L2 SRAM TLB entry and with my poor knowledge I do not know. As I wrote I started playing with ppc exactly week ago. So I can just decude from other architectures (arm, x86) how SRAM and L2 could work...
<Pali> s/v2021.04/v2022.04/
<Pali> forgot to do $year++
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* flyback tries one more time to install the eldk toolset
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* flyback is sick of packages that are broken
<dwrice0_> Complete noob to u-boot and SoC's in general. I've got the cross-compile toolchain and I've been able to compile for something running in qemu and I also have Friendlyarm (Friendlyelec) nanopi-neo2 and nanopi-neo2 and I can compile a stock config for them and with selections I do in make menuconfig. But if I want to manually mess with the dts, what is the "standard" way of doing that? Make a copy of the one it defaults do and edit there and then refer t
<flyback> Error: Can't read rootfs tarball "./targets/powerpc-4xx/core-image-minimal-dev-generic-powerpc-4xx.tar.gz ./targets/powerpc-4xx/core-image-minimal-generic-powerpc-4xx.tar.gz ./targets/powerpc-4xx/core-image-minimal-mtdutils-generic-powerpc-4xx.tar.gz ./targets/powerpc-4xx/core-image-minimal-xenomai-generic-powerpc-4xx.tar.gz"
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