00:42 <JamesMunns[m]> Hardware crypto primitives on MCUs are often not as fast as software impls, and implementing a fully misuse resistant Algo like aes-gcm-siv both requires additional software support, and I would bet is still slower than something like chacha20-poly1305 (also used today for desktop devices).

00:47 <JamesMunns[m]> tho hardware primitives may have different power and side-channel properties! Just noting that it isn't as simple as "hardware crypto is always better", even on MCUs.

02:14 <rolodondo34[m]> Has Redox OS ever been used as a switch, router, or firewall operating system?

07:17 <M9names[m]> Redox has it's own matrix rooms, maybe try asking there?

07:17 <M9names[m]> https://matrix.to/#/#redox-join:matrix.org

08:40 <korken89[m]> <korken89[m]> "All my fellow cryptography..." <- > <@korken89:matrix.org> All my fellow cryptography hobbyists, what's your view on the newly standardized Ascon?... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/hhFxpvRejCzSEZciDjPZZHGe>)

08:43 <korken89[m]> * On this, for those interested why Ascon is slower when papers say it should be faster:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/tnTMaXdiaVpcYNyArxVEGkNZ>)

08:44 <korken89[m]> * On this, for those interested why Ascon is slower when papers say it should be faster:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/FdxLEmhowVNUQkqKZciyQIVw>)

12:24 <dirbaio[m]> <korken89[m]> "I put all the testing here if..." <- do results change if you enable flash cache?

12:24 <dirbaio[m]> nvmc.icachecnf.write(|w| w.cacheen().enabled());

12:48 <korken89[m]> <dirbaio[m]> "do results change if you..." <- ```... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/ftonRrfLOgruVibzkctzmWgK>)

12:49 <korken89[m]> Alittle bit improproved, mostly Chacha got faster

12:49 <korken89[m]> * A little bit improved, mostly Chacha got faster

12:51 <dirbaio[m]>  it *widens* the difference , wow

12:51 <korken89[m]> Yeah

12:52 <korken89[m]> Chacha stomps ahead

12:52 <dirbaio[m]> Why did they use 64bit math in a cipher for embedded systems? 😂🤷

12:52 <korken89[m]> But makes sense, Chacha's round is really small in number of instructions while Ascon's sponge is the Constant, Sbox and diffusion stages

12:53 <korken89[m]> dirbaio[m]: This is 🪦

12:53 <dirbaio[m]> 💀! 

12:53 <korken89[m]> I was very excited before measuring, but measurements don't lie 😅

14:35 <firefrommoonligh> Interesting; I've been using chacha for encrypted LoRa comms

14:35 <firefrommoonligh> * LoRa comms (Cortex-M)

15:27 <djdisodo[m]> i want to buy sdcard module with pins searching aliexpress

15:27 <djdisodo[m]> where can i find one that has all pins connected

15:28 <djdisodo[m]> i want to avoid using spi since it didn't turn out to be fast

15:30 <mabez[m]> djdisodo[m]: Yeah SPI is super slow, the search term you'll want to use is SDIO

15:30 <mabez[m]> I see a bunch of adapters with all the pins exposed with SDIO tacked on to the end :)

15:31 <djdisodo[m]> thanks!

15:44 <djdisodo[m]> <mabez[m]> "I see a bunch of adapters with..." <- i need a full size but couldn't find one

16:02 <marmrt[m]> My understanding is that SDIO is not usable without paying for IP, and that SPI is basically fast enough, unless you're trying to stream video or something. (This understanding is based on a conversation at a xmas party, not actual experience)

16:59 <sourcebox[m]> <djdisodo[m]> "i want to avoid using spi..." <- There's one from Sparkfun: https://www.sparkfun.com/products/12941

17:54 <thejpster[m]> <marmrt[m]> "My understanding is that SDIO is..." <- this is also my understanding. And it's really 4 bit SD Bus mode vs 1 bit SD Bus mode vs 1 bit SPI mode, as while SDIO happens to use SD Bus Mode SD Cards can also use SD Bus Mode but are not SDIO devices.

17:54 <thejpster[m]> See https://en.wikipedia.org/wiki/SD_card#Transfer_modes

19:50 <whitequark[cis]> I think I had an SDIO spec somewhere?

19:50 <whitequark[cis]> I'm not totally sure though

19:51 <whitequark[cis]> ok it's just the simplified one

19:51 <whitequark[cis]> I think you could probably make a bad SDIO host using that, but it's hard to be sure without actually doing it

19:52 <whitequark[cis]> it's missing any timings and anything except for the happy path with polling only

19:52 <whitequark[cis]> whether that's "usable" depends on your application. if you're making a personal toy that needs SDIO WiFi you can probably use that, with unreasonable amounts of effort debugging it

19:53 <whitequark[cis]> if you're making anything low-power or high-performance it's definitely not gonna work

20:35 <d3zd3z[m]> The critical_section crate provides a Mutex which can protect data using critical sections. However, as there is no Arc in no_std code, how is it intended to share this Mutex between threads?

20:36 <d3zd3z[m]> Is it typically just made a global static, and used that way?

20:39 <d3zd3z[m]> e.g. `pub static EVENT_QUEUE: Mutex<RefCell<ArrayDeque<...>>>;`?

20:47 <adamgreig[m]> yea, that's typical