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<re_irc> <@s​h3rm4n:m​> David: What speaks against bumping the version? That 21.04 is not an LTS version?
<re_irc> <@e​ldruin:m​> GrantM11235: At first it looks interesting. it would need to be seen if it fits every use case well. As for bikeshedding, Locked does not sound like having much to do with chip-select, though
<re_irc> <@d​avidcole1340:m​> sh3rm4n: moreso the bump in libc version
<re_irc> <@d​avidcole1340:m​> at least that is what I was worried about
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<re_irc> <@h​doordt:m​> Hi everyone, at my company we're very interested in using async/await on embedded. We've been doing some research projects based on embassy (which, I might add, is a really impressive piece). However, we feel that before the async embedded ecosystem can take off, we need features like async traits in stable. Of...
<re_irc> ... course, that's a lot of work, and it has been going on for a while, but we're trying to find out where we might help out a bit. Doesn't need to be async traits, maybe we can do some work on embassy or something too.
<re_irc> <@h​doordt:m​> What do you guys feel would be a very nice feature to have, which could do with some large contribution?
<re_irc> <@m​athias_koch:m​> Hi!
<re_irc> <@m​athias_koch:m​> Given a piece of memory with a number of slices encoded as `2 bytes describing length (N), followed by N bytes of string payload`, repeated `M` times. Is it possible to somehow convert/transmute/whatever, that into `&[&str]`, without re-allocating?
<re_irc> <@h​argonix:m​> I don't think the typoes models what you got in your memory? What you describe sounds like you have some str (not &str) laying next to each other in memory, converting that into &[&str] would at least require to figure out a pointer to each of the str's location and put it in a seperate region so you can have...
<re_irc> ... the slice no?
<re_irc> <@d​irbaio:m​> you'll need to allocate the outer `&[]`, the inner `&str` can point to the original data just fine
<re_irc> <@y​atekii:m​> does anyone know if it is possible to compile selective dependencies with nighly?
<re_irc> <@d​irbaio:m​> enable an optional dep only when building with nightly? nope, not possible
<re_irc> <@y​atekii:m​> no, I want to build my proc_macro with nighly in my normal stable build
<re_irc> <@y​atekii:m​> :/
<re_irc> <@t​herealprof:m​> Like the hack which shall not be named?
<re_irc> <@y​atekii:m​> uff I do not know that one ^
<re_irc> <@y​atekii:m​> could you elaborate? :)
<re_irc> <@y​atekii:m​> I basically want the source file in my proc_macro and span start/ends which is currently nighly only
<re_irc> <@t​herealprof:m​> "nightly-crimes"
<re_irc> <@d​irbaio:m​> I think there's a way to get span info in stable, by stingifying it
<re_irc> <@y​atekii:m​> dirbaio: yes. not the source tho :)
<re_irc> <@y​atekii:m​> therealprof: thanks, I will commit high crimes then tonight :D
<re_irc> <@y​atekii:m​> hehehe
<re_irc> <@y​atekii:m​> if that works the epicness will be epic :D
<re_irc> <@y​atekii:m​> I already wanted to use unsafe to sneakily construct Spans ... turns out those things somehow tap into a shared memory pool of the rustc ???!! so I can't really XD
<re_irc> <@y​atekii:m​> I like how, ofc, disasm added support for embedded targets XD
<re_irc> <@d​isasm-ewg:m​> I couldn't resist!
<re_irc> <@y​atekii:m​> I'm glad :D
<re_irc> <@y​atekii:m​> I will use this so bad for my crate XD
<re_irc> <@t​herealprof:m​> Partners in crime.
<re_irc> <@y​atekii:m​> it's not even bad for safety because it's in a proc_macro. which generates code which then will be checked by the stable compiler :)(
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<re_irc> <@e​ldruin:m​> hdoordt: Hi, I believe this is a great initiative that we should not allow to fade into oblivion just by how a chatting room works. Here a couple alternatives, in no particular order:
<re_irc> <@e​ldruin:m​> 1. Bring this offer up in the embedded WG weekly meeting (Tuesdays 20:00 CEST)
<re_irc> <@e​ldruin:m​> 2. Open an issue in the [embedded WG repo](
<re_irc> <@h​doordt:m​> eldruin: Great, thanks for the pointers. For others reading this: any particular pain points you would like to see addressed?
<re_irc> <@e​ldruin:m​> For the record, we keep a list of not-yet-awesome stuff here:
<re_irc> <@d​irbaio:m​> wrt async there's a WIP PR adding async traits to `embeddd-hal`
<re_irc> <@d​irbaio:m​>
<re_irc> <@d​irbaio:m​> which would replace `embassy-traits` and allow starting up an ecosystem of async drivers
<re_irc> <@d​irbaio:m​> the main pain point is no async traits in stable as you mentioned, but there's been lots of movement on this in Rust lately and it'll probably be stable soon
<re_irc> <@d​irbaio:m​> (and in the meantime using nightly is not *that* bad, my company is shipping devices with firmware with nightly and embassy and no problems there)
<re_irc> <@h​doordt:m​> dirbaio: This one's quite interesting, thank you
<re_irc> <@h​doordt:m​> Another interesting topic is secure booloading w/ OTA update support. What is the status quo on that in embedded Rust?
<re_irc> <@m​athias_koch:m​> Here you go:
<re_irc> <@h​doordt:m​> Ah I saw the release announcement on Reddit e few day ago I think. Anyone using it? Any thoughts?
<re_irc> <@m​athias_koch:m​> Nope, we are rolling our own implementation from long before the release of loadstone, but i still think it looks interesting.
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<re_irc> <@t​halesfragoso:m​> MathiasKoch: What platform ? Is your usize 2 bytes ? .-.
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<re_irc> <@m​athias_koch:m​> thalesfragoso: stm32l4
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<re_irc> <@m​athias_koch:m​> Is there any way to force my stm32 to restart on a stack overflow?
<re_irc> <@r​ahix:m​> MathiasKoch: Well, first of all you need to detect a stack overflow. E.g. by using `flip-link` so a stackoverflow leads to a CPU exception
<re_irc> <@r​ahix:m​> you could then write you HardFault handler to reset the system
<re_irc> <@m​athias_koch:m​> I am running with flip-link, sp thats no issue
<re_irc> <@m​athias_koch:m​> Aha, it's a hardfault 👍️
<re_irc> <@r​ahix:m​> IIRC you can configure the CPU to use either the HardFauly vector for everything, or use the more specific vectors for more specific exceptions instead
<re_irc> <@m​athias_koch:m​> Is there some easy way to set the hardfault handler? like the panic handler?
<re_irc> <@r​ahix:m​> yes, check the cortex-m-rt docs
<re_irc> <@r​ahix:m​> fn HardFault() -> ! {
<re_irc> <@r​ahix:m​> iirc
<re_irc> <@r​ahix:m​> #[cortex_m_rt::exception]
<re_irc> <@r​ahix:m​> }
<re_irc> <@r​ahix:m​> Something like
<re_irc> <@m​athias_koch:m​> Awesome! Thanks :)
<re_irc> <@r​ahix:m​> from the exception frame passed to the HardFault handler you could even get an address of where the PC was while triggering the overflow.
<re_irc> <@m​athias_koch:m​> Now i just need to figure out what hogs all my stack :/
<re_irc> <@r​ahix:m​> print out that address, and pipe it into addr2line firmware.elf to find out what line it corresponds to
<re_irc> <@m​athias_koch:m​> ```rust
<re_irc> <@m​athias_koch:m​> pub mod stack {
<re_irc> <@m​athias_koch:m​> I came across this
<re_irc> <@m​athias_koch:m​> use core::sync::atomic::{AtomicUsize, Ordering};
<re_irc> <@d​irbaio:m​> mov $0, rsp maybe?
<re_irc> <@m​athias_koch:m​> are you asking? 🤣
<re_irc> <@m​athias_koch:m​> I just want to store the current stack pointer address into x
<re_irc> <@r​ahix:m​> and that tick macro actually can race with itself if you also use it from interrupt context
<re_irc> <@d​irbaio:m​> It's "mov dst src", I think it's the other way around
<re_irc> <@m​athias_koch:m​> I don't intend to.. Just wanted to use it to narrow down which function my nightmare stems from
<re_irc> <@m​athias_koch:m​> the stack-sizes analysis only brings me so far..
<re_irc> <@m​athias_koch:m​> and i cant seem to make work with newer compilers
<re_irc> <@r​ahix:m​> i think it's easiest to just read out the address of the stack overflow from the exception frame passed to the hardfault handler
<re_irc> <@r​ahix:m​> = the pc field in that struct
<re_irc> <@m​athias_koch:m​> Yeah, but that would only give me the address of the allocation that tips it over the stack limit, right? could be that i have a 50K allocation before that, that is just never dropped or something?
<re_irc> <@w​salmon:m​> anyone here got anythoughts on ?
<re_irc> <@r​ahix:m​> rahix: actually, scratch that, this won't work probably
<re_irc> <@r​ahix:m​> the stackpointer is already at the bottom of ram so your hardfault handler will trigger yet another fault most likely
<re_irc> <@x​norman:m​> I'm curious about implementing `nb::Result` for a method that takes args..
<re_irc> <@x​norman:m​> I currently have a method that erases and programs flash memory over quad spi. it can take some time so having some way to poll for it makes sense, if i used nb, I'm wondering what the API would be? for programming memory for instance, something like program(address, slice) .. would that return an nb::Result and...
<re_irc> ... then you just call it over and over again with the same args?
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<re_irc> <@t​halesfragoso:m​> MathiasKoch: so your `usize` is 4 bytes, not 2
<re_irc> <@r​ahix:m​> Alex Norman: I think the function should expect to be called with the same arguments until it returns something that isn't WouldBlock. That's what the nb::block!() macro does at least
<re_irc> <@r​ahix:m​> rahix: i.e. you'd need a HardFault handler which first moves the stack pointer back into a sensible location in RAM before doing anything else
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<re_irc> <@j​beaurivage:m​> Hi, is anyone having problems with GHA? Over at atsamd-hal, for some PRs, it seems to run half the jobs then never starts the other half
<re_irc> <@t​halesfragoso:m​> jbeaurivage: yes, same problem on embassy
<re_irc> <@t​herealprof:m​> Oh, is it Travis CI remembrance day? 😅