<re_irc> <@d​irbaio:m​atrix.org> :D https://github.com/japaric/heapless/pull/219
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<re_irc> <@g​rantm11235:m​atrix.org> dirbaio: Did you mean to leave a `todo!` in `clear`?
<re_irc> <@d​irbaio:m​atrix.org> ooops, fixing
<re_irc> <@l​achlansneff:m​atrix.org> dirbaio: That const assert stuff on stable is pretty clever
<re_irc> <@l​achlansneff:m​atrix.org> There are some methods on the heapless::Vec that could use that I think
<re_irc> <@l​achlansneff:m​atrix.org> Obviously, the const assert stuff is already used in the project, just saw the deque pr using it
<re_irc> <@d​irbaio:m​atrix.org> yeah, I based it heavily on Vec
<re_irc> <@d​irbaio:m​atrix.org> `clear` fixed lol
<re_irc> <@l​achlansneff:m​atrix.org> I wonder if Vec::into_array could use that instead of returning an error
<re_irc> <@d​irbaio:m​atrix.org> I didn't even look at how the const assert was implemented lol... now have and WTF it's so much black magic
<re_irc> <@d​irbaio:m​atrix.org> well into_array has to check the len matches, not the capacity. and the len is only known at runtime
<re_irc> <@l​achlansneff:m​atrix.org> Oh, you're right
<re_irc> <@l​achlansneff:m​atrix.org> nvm
<re_irc> <@l​achlansneff:m​atrix.org> Vec should have a from array impl imo
<re_irc> <@d​irbaio:m​atrix.org> you can do that with from_slice
<re_irc> <@l​achlansneff:m​atrix.org> True
<re_irc> <@l​achlansneff:m​atrix.org> Anyhow, not relevant, sorry
<re_irc> <@a​damgreig:m​atrix.org> dirbaio: better or worse than https://crates.io/crates/static_assertions ?
<re_irc> <@a​damgreig:m​atrix.org> i remember doing this sort of thing in C before C11 got static assertions, lol https://docs.rs/static_assertions/1.1.0/src/static_assertions/const_assert.rs.html#55
<re_irc> <@d​irbaio:m​atrix.org> dunno, the idea seems pretty similar
<re_irc> <@a​damgreig:m​atrix.org> hah, cute, I think that's better
<re_irc> <@d​irbaio:m​atrix.org> what I find fascinating is
<re_irc> <@d​irbaio:m​atrix.org> you can "mention" the `Assert::<N, 0>` type and that's just fine
<re_irc> <@d​irbaio:m​atrix.org> it only explodes when you try to *use* one of the associated consts that becomes negative
<re_irc> <@d​irbaio:m​atrix.org> wtf, why?
<re_irc> <@a​damgreig:m​atrix.org> 🪄
<re_irc> <@d​irbaio:m​atrix.org> mega magic
<re_irc> <@d​irbaio:m​atrix.org> and this is *stable*
<re_irc> <@d​irbaio:m​atrix.org> "regular" ill-formed consts like `const X: usize = 2 - 3;` explode immediately even if unused
<re_irc> <@d​irbaio:m​atrix.org> but associated consts explode only when used... WTF?
<re_irc> <@o​rvi:m​atrix.org> maybe its slipping by an analysis pass somewhere
<re_irc> <@d​irbaio:m​atrix.org> https://github.com/rust-lang/rust/issues/71800
<re_irc> <@d​irbaio:m​atrix.org> very interesting
<re_irc> <@o​rvi:m​atrix.org> :eyes:
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<re_irc> <@w​illeml:m​atrix.org> Any recommendations on powerful risc-v microcontrollers for a rust project? (over 200mhz, 256K ram and decent storage or at least external storage possibilities)
<re_irc> <@w​illeml:m​atrix.org> as well as spi for display and stuff
<re_irc> <@w​illeml:m​atrix.org> "powerful"
<re_irc> <@w​illeml:m​atrix.org> I am mostly just curious as to how much it would cost and where I would get it...
<dcz_> I don't know if you can get the microcontroller separately
<dcz_> seems only to have 16KiB RAM though
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<re_irc> <@t​herealprof:m​atrix.org> SiFive (like any manufacturer) would love to sell MCUs separately. 😉
<Lumpio-> But can't due to fab availability shortages or what
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<dcz_> SiFive are not much of a manufacturer, they sell designs
<re_irc> <@9​names:m​atrix.org> willeml: K210 is sufficient for those needs (400mhz, dual core, 8MB SRAM). guess it depends on your definition of "decent storage" and microcontroller though.
<re_irc> <@9​names:m​atrix.org> it doesn't really have many peripherals. it is reasonably low power. you can operate it without an MMU (which is for the best, because that is kinda broken)
<Lumpio-> o
<re_irc> <@t​herealprof:m​atrix.org> dcz_: That is true. But they have partners which do. And they belong to Intel now so things might change. 😉
<dcz_> do they? I thought they didnt get sold yet
<dcz_> also, I haven't seen a single design by SiFive being sold by anyone else to the general public
<re_irc> <@t​iwalun:m​atrix.org> The BL602 and BL607 chips are based on SiFive designs: https://www.sifive.com/press/bouffalo-lab-standardizes-on-sifive-risc-v-embedded
<re_irc> <@t​herealprof:m​atrix.org> dcz_: Hm, again you're right. Officially it's still only a collaboration to produce chips in Intel fabs.
<re_irc> <@t​herealprof:m​atrix.org> I thought that was a done deal already.
<dcz_> nice catch with the Bouffalo, that's at least one public design. I still couldn't find anywhere to buy them after a quick search
<re_irc> <@9​names:m​atrix.org> you can get them from pine64, seeedstudio, aliexpress
<re_irc> <@9​names:m​atrix.org> doesn't quite meet your reqs though - they don't run above 200Mhz, and once you allocate RAM for the flash accelerator you're below 256K SRAM
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<re_irc> <@d​khayes117:m​atrix.org> You can buy the fe310-g002 chips in packs of 5 from https://www.crowdsupply.com/sifive/hifive1-rev-b#products-top
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<re_irc> <@d​khayes117:m​atrix.org> There is also the new k510. https://www.cnx-software.com/2021/07/09/kendryte-k510-tri-core-risc-v-ai-processor-3-tops/
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<re_irc> <@j​beaurivage:m​atrix.org> Hi, is anyone here familiar with `embedded-sdmmc`?
<re_irc> <@w​illeml:m​atrix.org> 9names: awesome, that sounds like exactly what I was looking for
<re_irc> <@w​illeml:m​atrix.org> Where do I buy these boards? I could only find it on amazong for 44$ https://www.amazon.ca/Kendryte-development-Machine-vision-versio/dp/B08134LLF2
<re_irc> <@w​illeml:m​atrix.org> (k210)
<re_irc> <@e​ldruin:m​atrix.org> jbeaurivage: There are a few of them here. feel free to ask
<re_irc> <@j​beaurivage:m​atrix.org> Recently I can't seem to be able to initialize my cards. I've tried multiple cards on two (seemingly) identical boards with no success.
<re_irc> <@j​beaurivage:m​atrix.org> ```rust
<re_irc> <@j​beaurivage:m​atrix.org> let spi_bus = bsc::spi_master(
<re_irc> <@j​beaurivage:m​atrix.org> &spi_clock,
<re_irc> <@e​ldruin:m​atrix.org> inevitable answer: what changed in software or hardware?
<re_irc> <@j​beaurivage:m​atrix.org> No change in hardware, there were some changes to the SPI driver in `atsamd-hal` recently
<re_irc> <@j​beaurivage:m​atrix.org> I'm also wondering what could've changed in embedded-sdmmc, though the last commit was December 5 2020 so unlikely that broke
<re_irc> <@e​ldruin:m​atrix.org> have you always been using the same embedded-sdmmc version?
<re_irc> <@j​beaurivage:m​atrix.org> Pretty sure I've been using 0.3 since the beginning of the project
<re_irc> <@e​ldruin:m​atrix.org> alright, have you tried reverting to an earlier atsamd-hal version?
<re_irc> <@j​beaurivage:m​atrix.org> I'm doing that now. So far without success
<re_irc> <@j​beaurivage:m​atrix.org> Do you happen to know which SPI mode/bit order SD cards operate under? I suspect the defaults might've changed with increasing HAL versions
<re_irc> <@e​ldruin:m​atrix.org> I do not know from the top of my head
<re_irc> <@l​achlansneff:m​atrix.org> Is there a reasonable way use an embedded peripheral/device driver that runs on top of an rtos abstraction on embedded rust? e.g. The driver requires you to implement a way to create threads
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<re_irc> <@j​amesmunns:m​atrix.org> Lachlan Sneff: I know the espressif folks are wondering the same thing right now.
<re_irc> <@j​amesmunns:m​atrix.org> As esp-idf is currently based on freertos, for example
<re_irc> <@d​irbaio:m​atrix.org> sounds like a bad driver if it requires threads :D
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<re_irc> <@a​damgreig:m​atrix.org> in cmsis land there's cmsis-rtos which most RTOSs targetting cortex-m implement, and provides a common set of methods that applications and drivers can use
<re_irc> <@a​damgreig:m​atrix.org> i haven't seen such a thing in rust yet but there's not exactly an abundance of rust rtoses either
<re_irc> <@a​damgreig:m​atrix.org> but in principle you could totally have something akin to the e-h traits but for rtos functionality
<re_irc> <@d​irbaio:m​atrix.org> I'd love such a thing to *keep not-existing* 🤣
<re_irc> <@d​irbaio:m​atrix.org> otherwise drivers will start using it, and then you suddenly need an RTOS
<re_irc> <@d​irbaio:m​atrix.org> and many of the reasons to use an RTOS in C don't apply to Rust
<re_irc> <@o​rvi:m​atrix.org> how do drivers normally handle async stuff? or are the drivers themselves wrapped in threads?
<re_irc> <@d​irbaio:m​atrix.org> concurrency? IMO async/await is way better
<re_irc> <@d​irbaio:m​atrix.org> uniform vendor-independent API for uart/spi/i2c/etc? we have embedded-hal for that
<re_irc> <@d​irbaio:m​atrix.org> integrated networking? again, with the power of Rust traits you can super easily and foolproofly wire up combinations like smoltcp + stm32-eth + stm32xxx-hal
<re_irc> <@d​irbaio:m​atrix.org> orvi: currently most rust drives are simply blocking...
<re_irc> <@d​irbaio:m​atrix.org> or at most "hey please call this function on irq"
<re_irc> <@d​irbaio:m​atrix.org> with async the drivers would have `async fns` in the public api, user calls them and the driver does things asynchronously without blocking
<zBeeble> OK. I must admit to being a bit lost. I'm trying to get rust to bootstrap on RISCV64 on FreeBSD. I'm having trouble finding a good set of instructions and/or instrucations I find no longer work.
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<zBeeble> I think that I have an acceptable resource file (.rs file) but ./configure on the crossbuild host ends up saying "unknown cpu type: riscv" or, alternatively. option '--enable-rustbuild' is not recognised (following different sets of directions)
<re_irc> <@o​rvi:m​atrix.org> thanks @dirbaio :+1:
<re_irc> <@l​achlansneff:m​atrix.org> dirbaio: I'm still not sure how to get drivers to be async around an irq without the user doing that extra work.
<re_irc> <@d​irbaio:m​atrix.org> the HAL would do it
<re_irc> <@d​irbaio:m​atrix.org> for example
<re_irc> <@d​irbaio:m​atrix.org> - HAL manages the SPI regs + irq, produces a struct that impls `eh::futures::spi::Transfer`
<re_irc> <@d​irbaio:m​atrix.org> so there's a chain of futures: user -> driver -> hal
<re_irc> <@d​irbaio:m​atrix.org> the HAL is responsible for managing the irq. When the irq fires, the hal wakes some waker if needed, which causes the executor to poll the futures again
<re_irc> <@d​irbaio:m​atrix.org> everything is interrupt-driven under the hood, but neither driver code or user code has to worry about interrupts
<re_irc> <@l​achlansneff:m​atrix.org> Ah, awesome, I see.
<re_irc> <@l​achlansneff:m​atrix.org> And so, the spi struct in the hal would require an owned interrupt to be created?
<re_irc> <@d​irbaio:m​atrix.org> embassy does it with owned interrupts yep
<re_irc> <@d​irbaio:m​atrix.org> there are other ways
<re_irc> <@d​irbaio:m​atrix.org> out of the experimentation I've done, owned interrupts are the best way I've found...
<re_irc> <@d​irbaio:m​atrix.org> for example HALs can outright register the interrupts themselves with `#[interrupt]` directly
<re_irc> <@d​irbaio:m​atrix.org> but then there's no way for the user to register the interrupts if they want to do something custom
<re_irc> <@l​achlansneff:m​atrix.org> dirbaio: For sure it is, but it's a binary blob. There's nothing I can do about it.
<re_irc> <@l​achlansneff:m​atrix.org> Wifi driver
<re_irc> <@d​irbaio:m​atrix.org> which chip?
<re_irc> <@l​achlansneff:m​atrix.org> I don't actually need it, but I was curious if I could use it.
<re_irc> <@l​achlansneff:m​atrix.org> Murata 1dx, iirc
<re_irc> <@d​irbaio:m​atrix.org> weird chip...
<re_irc> <@d​irbaio:m​atrix.org> wow that sucks that it's a blob AND requires threads
<re_irc> <@l​achlansneff:m​atrix.org> #justembeddedthings
<re_irc> <@l​achlansneff:m​atrix.org> It's annoying that C is so bad that it needs a fake operating system, even on embedded systems
<re_irc> <@l​achlansneff:m​atrix.org> But it's just how it is
<re_irc> <@d​irbaio:m​atrix.org> yeah......