sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv | Matrix: #riscv:catircservices.org
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<conchuod> sorear: Me being narrow minded as to what is an extension I guess, I guess it is.
<conchuod> Is PoC required for SBI extensions to be in a frozen version of the SBI spec?
<palmer> PoC is never really required, they just get waivers
<palmer> and there's at least stuff like `RISCV_ISA_V` that can be turned off too, there's a few floating around in the Kconfig
<palmer> I guess Atish would know what the rules are for SBI? they're usually pretty mushy about defining rules for the non-ISA stuff, psABI and SBI have been super mushy
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<jrtc27> often the waivers are decided by ISA people without consulting the non-ISA people :)
<sorear> how does that work?
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<sorear> jrtc27: https://lists.riscv.org/g/tech-privileged/message/1905 speak now or forever hold your peace
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<jrtc27> sorear: I can't obviously see a way to reply to that
<jrtc27> normally groups.io has a reply button, but it's not there
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<jrtc27> but quite frankly the various configurational aspects of some of these extensions are being designed by people who don't know how software really works
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<jrtc27> and for whom "just do an SBI call" is deemed a legitimate solution, not a way to patch over bad ISA design
<sorear> I have a "Reply Like More" line with icons in the web UI, I don't have a 2.5D Reply button like the Previous Topic / Next Topic button
<sorear> are you subscribed to tech-privileged?
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<jrtc27> no
<jrtc27> (I assume these button links are in the normal place, ie the grey bar directly beneath the message?)
<jrtc27> ok, subscribing made them appear
<sorear> it's a grey bar directly beneath the message, yes
<jrtc27> because that's a sensible thing to require....
<jrtc27> for an unmoderated list....
<sorear> I don't want to assume groups.io isn't doing A/B test silliness or (more likely) UA sniffing / wildly different layouts for mobile and desktop browsers
<sorear> is https://github.com/riscv/riscv-cheri/pull/140#issuecomment-1987540023 an ask to wait until the ISA is frozen and ratified before thinking at all about how software needs to use the ISA?
<jrtc27> no, just that there are bigger fish to fry at the moment, and whatever gets written today for SBI is likely to become stale
<jrtc27> it's still worth keeping system/hypervisor/firmware calls in the back of one's mind, like any part of the software stack
<sorear> one of the things I liked about 2016-era risc-v was the degree to which actual experience with working software guided the ISA design
<jrtc27> lol
<sorear> cut to mid-2023 and we finally have a sort of working most of the time vectorizerizing compiler, 4 years after ratifying an extension that was allegedly designed for vectorizing compilers to the exclusion of other traditional simd use cases like media
<jrtc27> and Svadu gets ratified with no way for S-mode to turn it on without talking to M-mode via SBI
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