sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<ssb> received nezha board, fired up my favourite benchmark and unexpectedly got "C" slower than without "C"
<ssb> has anyone else noticed RVC / RV performannce difference, and in which direction?
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<jimwilson_> normally C should make code faster, but can make it slower due to secondary effects, e.g. a label that is cache line aligned because unaligned, or two functions that mapped to different cache lines now map to the same cache line
<jimwilson_> because -> becomes
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<cousteau> just make block size 4 bytes, problem solved
<cousteau> or 2 bytes if you want to support the C extension+
<cousteau> ...was jimwilson_ talking about the C language or the C extension?
<ssb> C extension
<cousteau> that would make more sense
<ssb> (he was replying to me -- I did some benchmarking on my nezha board and found RVC to be slightly slower)
<cousteau> I've dealt with weird cache issues in the past
<cousteau> not "issues" as in "code doesn't work because somebody forgot to invalidate the cache", but as in "code is slower if matrix size is a multiple of a power of 2"
<ssb> but then I tried more elaborate compilation options, involving -flto and -fprovile-generate/use and -static and got the expected result: RVC faster (but very slightly so)
<cousteau> like, a matrix multiplication of a 96x96 matrix was slower than 95x95 or 97x97 on a powerpc, iirc
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<jrtc27> RVC can also be slow if the microarchitecture is crappy
<jrtc27> e.g. branch predictors that forget about the fact bit 1 is no longer always 0
<jrtc27> or a fetch unit that has weird behaviour when compressed instructions are mixed in due to them being a different size
<jrtc27> I've seen and fixed both (in the same core)
<cousteau> I think this was a 4-way 32KB cache, so it was 4 ways * 128 lines/way * 64 bytes/line, so caching a whole column of a 32n*32n matrix of doubles (stride = 256n bytes) somehow filled up all the ways in the cache so performance went to hell
<cousteau> ...I'd need to redo the math but I think I did back in the day and it checked out
<cousteau> jrtc27: "forget" has a penalty in efficiency, or straight out breaks the architecture because the branch starts executing at the wrong point?
<jrtc27> should only be the former unless you really screw up, given you always need to be prepared for predictions to be wrong...
<cousteau> (fetches an extra unnecessary instruction / straight out ignores cases with misaligned instructions / mess up)
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<sorear> could be fun to look into the details of the benchmark
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<RNeese> we have discord also for those who use it
<la_mettrie> fuck the discord
<RNeese> well thats where alot of the work is going on
<RNeese> and hoping more come and help
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<pierce> <RNeese> "well thats where alot of the..." <- speaking of this
<pierce> i have noticed a considerable decrease in activity here in chats and forums, it's mainly just in the mailing lists where most work is pretty invisible
<pierce> like "oh yeah, we merged in V extensions into LLVM a while ago"