12:20 <sage_p> Has anyone tried interfacing with the Lattice memory mapped interface on a litex SoC? It seems awfully close to just being simple wishbone

12:22 <sage_p> id like to be able to talk to some of the hard IP modules on the CrosslinkNX from the soc and basically all of them use LMMI

12:38 <whitequark[cis]1> <sage_p> "Has anyone tried interfacing..." <- from what ive seen lattice uses wishbone in their hard ip, yes

13:04 <sage_p> i gave it an initial try the other day and couldnt get the SoC and IP talking nicely. Thanks for the confirmation, ill double check im not making an obvious mistake