ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion
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<macromorgan>
can the rockchip-bsp U-Boot be used to create an SPL stage? Or are we forced to use the pre-compiled SPL stage from the rkbin repository?
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<macromorgan>
has Rockchip posted fixed A-TF files for the likes of the "arm-scmi firmware:scmi: Malformed reply - real_sz:8 calc_sz:4 (loop_num_ret:1)" errors?
<CounterPillow>
not to my knowledge on both parts, the problem is the dram training on the former question which is in the tpl
<CounterPillow>
rkbin also hasn't been updated since March. Let me check if at least the kernel side workaround for it is in
<CounterPillow>
Looks like the kernel side workaround is in
<CounterPillow>
so at least it no longer kills your clocks and such :)
<CounterPillow>
but wrt. firmware (either open-sourcing it or releasing a version with the fix pulled in) en attendant Godot.
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<macromorgan>
and yet it still kills my clocks... I wonder why...
<macromorgan>
(I've confirmed I'm using the latest master, rebased as of about an hour ago)
<macromorgan>
I'll try switching to BSP U-Boot and see, for now I'm using upstream-ish (upstream U-Boot but with binary A-TF, No Optee, and binary ram init)
<macromorgan>
on a related note, has anyone successfully built a BSP SPL stage? for the rk356x?