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<f_>
Hey all.
<f_>
About the RAM init..how should I implement it? Should I try to parse an acs.bin in the build process or try RAM timings that work on the most boards?
<f_>
I know some RAM timings from some boards work on others (The RAM timings for the NanoPi-K2 and the WeTek Hub all work for me), but others don't seem to work at all on my set-top box (those for the p201, for example)
<narmstrong>
f_: no idea, how this is done on other platforms ? Perhaps add some DT files per boards with all the ram timings and use that ?
<f_>
Possibly?
<f_>
This is something I need to work on after I get BL2 to work. But now, for kicks and giggles let's just hardcode all that.
<f_>
Still. Would be nice to have TF-A's BL2 working on the most boards possible.
<f_>
Maybe we could also have a tool that generates a header file containing timings and use it?
<f_>
At this point I think I'll just port Amlogic's RAM init code and be done with it.
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<f_>
Ok
<f_>
Amlogic's ddr.c is basically...a bazillion wr_reg()
<f_>
And wanna know what wr_reg does?
<f_>
wr_reg(address, data) is equivalent to..... (*((volatile unsigned *)address))=(data)
<f_>
I mean...why did they feel like wanting to have a macro for this?
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<f_>
I imported Amlogic's RAM init code into TF-A. Doesn't compile yet even after my modifications (which are supposed to make it independent from their U-Boot tree)
<f_>
I'll investigate tomorrow, most likely.
<f_>
At least I know better how Amlogic's RAM init code works.
<f_>
It mostly just writes at specific addresses stuff.