12:10 <jamesmunns[m]1> Just a quick question while also trying to navigate the ICE40 datasheet, if I wanted to use the LVDS port of a revC glasgow as 24 "bonus I/O pins", where would I find the acceptable voltage/current limits for those pins?

12:10 <jamesmunns[m]1> I don't plan to drive anything significant (just signal level stuff, < 0.5mA/pin), but was wondering if those pins could handle 3v3, or only lower 1.8/2.5v signal levels.

12:42 <jamesmunns[m]1> Answering my own question, hopefully correctly: The LVDS port is on IO Bank 3, which does have the LVDS25/SubLVDS interfaces, but also seems to have LVCMOS33 I/O interfaces as well, which means *I think* I should be able to reasonably use these pins at a 3v3 line level without problem.

12:42 <jamesmunns[m]1> WRT to current sink/sourcing, it seems that LVCMOS33 can source/sink 8mA per pin (e.g. not 16/24mA like the high power pins), but i'm not totally sure how those limits are spread over per-pin or per-bank basis, but I'm almost certianly fine for a couple of hundred of uA per pin for signal levels (not planning anything more extreme than i2c with 10k pullups).

12:50 <omnitechnomancer> IO bank 3 is the one which has differential input buffers hence the LVDS naming

12:51 <omnitechnomancer> Remember that you have to hook up the VCC IO for the bank and that this will set what IO standards you can use and that that port does not have any of the ESD or other protections the regular pins have

12:53 <omnitechnomancer> If you look at "sysIO Single-Ended DC Electrical Characteristics" in the iCE40 datasheet the table unhelpfully has two sub rows for the VOL Max, VOH Min, IOL Max and IOH Max parameters with no indication of what this split means or how it applies

12:54 <jamesmunns[m]1> That makes sense, thanks! I mostly wanted to make sure that the pins weren't particularly limited in another way. This would specifically be for testing an MCU assembly, which would be universally 3v3, and having 40 I/Os instead of 16 was my interest

12:54 <jamesmunns[m]1> Yeah, I saw that, do you know what the split means?

12:55 <omnitechnomancer> I do not

12:57 <jamesmunns[m]1> Gotcha! I'm not actively working on this yet, so I'm sure I'll poke around later, but I wanted to check if it was vaguely feasible. I talked to whitequark in another room who pointed out that the lvds port could be used for other things (like HyperRAM expansion cards), which got me thinking about what else could be possible 🙂