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<d1b2>
<cfy_yfc> it seems to me that the whole oscillator/sync thingy is easier to solve when doing this through the FX2 as opposed to the FPGA; I think what could be a potential solution is to use a configurable solder bridge that makes it easy to switch between an SMA input to the FX2 or the oscillator on the board; I'm just confused though what the sync pin was intended for as this appears to only allow syncing between the FPGAs which is not such a great
<d1b2>
idea after all since it would be async to the FX2 clock which in turn renders the FIFO non-functional (unless manually implementing a proper clock domain crossing solution)
<electronic_eel>
@cfy_yfc iirc the fx2 only supports using a 24 MHz crystal. so i don't think you gain the ability to use another clock speed by being able to input another clock signal into the fx2. or do i misunderstand you?
<d1b2>
<cfy_yfc> it is not about gaining another clock speed; it is about having a more stable clock (e.g., less drift, better ppb; etc.)
<d1b2>
<cfy_yfc> and in that regard, any oscillator/crystal can be replaced for as long as the replacement is better in terms of accuracy/jitter/drift/etc.
<electronic_eel>
yeah, ok, that would be possible. but the fx2 oficially only supports using a crystal, not a clock signal. you can probably tweak it to accept one, but that is not officially supported by cypress afaik
<electronic_eel>
also i'm not sure if that is such a common requirement that adding several components and especially an external connector is worth it
<electronic_eel>
you can of course always desolder the crystal on your board and hook up a small adapter board to do that
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<whitequark>
an SMA is massive compared to our board and we don't have space for it for sure
<whitequark>
electronic_eel: you should be able to feed any suitable clock to FX2's XI, no?
<whitequark>
electronic_eel: actually, I believe you're wrong about FX2
<whitequark>
Crystal Input. Connect this signal to a 24-MHz parallel-resonant, fundamental mode crystal and load capacitor to GND.
<whitequark>
It is also correct to drive XTALIN with an external 24-MHz square wave derived from another clock source. When driving from an external source, the driving signal should be a 3.3-V square wave.
<whitequark>
it -is- explicitly supported, see CY7C68013A datasheet page 24
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<electronic_eel>
ok, you are right, it it supported. we could maybe squeeze in an unpopulated u.fl footprint and a solderbridge to choose between the crystal and the u.fl or something like that
<electronic_eel>
but i'm still not really convinced that it is worth it
<whitequark>
i think that the few people who need it can desolder the crystal
<whitequark>
it's a very niche application
<whitequark>
and ideally we'd just have async applets working
<electronic_eel>
yeah, proper support for async applets would be best. also we could add some more advanced pll ic to revE to better allow to lock the fpga to multiples of external clocks or similar things
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<d1b2>
<Hardkrash> If the mating connector was less expensive the Murata MM8030-2610RJ3 is a nifty space saving switch connector. The biggest draw back aside from cost is the 100 cycle durability. But that is similar to u.fl connectors. The plus is that the connector is more robust to user insertion than u.fl
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