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<Romi2> Is there anyone here who can help me troubleshoot can bus on a beaglebone? I've only gotten it to recieve two packets, afterwards it just locks up
<Romi2> Nvm on that, finally got it to work now
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<kveremitz> ooh, what was the problem romi ?!
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<Romi> Honestly, no clue at this point. It might've been a mix of bad hardware (switched out transceivers) and bad bitrate / some sort of timing issue
<kveremitz> eww
<Romi> Some bitrates just don't seem to work well with the beaglebone, especially slow ones like 10k
<Romi> Wish there was some way to get better debug info, usually the interface just locked up, without any info on why
<Romi> debugging was painful, as I didn't have any known good hardware to test on :)
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<kveremitz> aye that doesn't help!
<kveremitz> been there, at times
<Romi> Yea, at least after 3 days of trying, finally got it running
<Romi> Never thought CAN could be so finicky
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<set_> GenTooMan: !
<set_> I am at a loss for wordage.
<set_> Wait! I know...
<set_> Um...when people on the forum discuss specific chips, is that open to discussion for Capes or is it something else?
<set_> That page...what exactly does it entail?
<set_> scrrrratch that. I am finally understanding it again. RTL and open design for the actual chip, i.e. verilog and so on.
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