whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · play https://amaranth-lang.org/play/ · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
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<korken89[m]> Has anyone tried to make a "general" I/O delay for Amaranth? I've been testing RGMII and need to use a DELAYG on the clock I/O pins in the ECP5 - but I'd like to also have the same effect in simulation. I'm not sure how to do this delay in (only) simulation. Has anyone played with this?
<korken89[m]> s/(only)//
<whitequark[cis]1> you could make a simulation process and use await ctx.delay(...)
<whitequark[cis]1> (this is the only way to do this in Amaranth simulation)
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<korken89[m]> Alright, so it can be applied on a signal basis to delay a signal some specific amount?
<whitequark[cis]1> yes, you can construct a delay element (fixed or configurable) by adding this process and giving it two Signals
<whitequark[cis]1> note however that this wouldn't be a true delay line because while it's stuck in await ctx.delay(...) it cannot watch for await ctx.changed(...)
<whitequark[cis]1> so you can delay the signal by a little bit if your clock is larger than that and you just want to shift a waveform in the viewer
<whitequark[cis]1> but if you need to phase align a signal that's as fast as your clock, currently this wouldn't be possible (and would need an RFC and more importantly design/implementation work to enable)
<korken89[m]> Cool, thanks for the help!
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<mabl[m]> <whitequark[cis]1> "so you can delay the signal by a..." <- I have been abusing a FIFO object to delay longer than a clock cycle in simulation
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<whitequark[cis]1> yeah, that's basically what is a delay line is anyway
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