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<
underst0rm[m] >
Hi, I was wondering if there is example code for AXI (lite) interfaces using all the goodies from Amaranth 0.5 and recent amaranth-soc?
07:06
<
whitequark[cis] >
there isn't
07:38
<
whitequark[cis] >
<zyp[m]> "yeah, I'm not asking for a..." <- io.DDRBuffer is more than just about simulation: it specifically exists to abstract over the implementations of different DDR buffers
07:38
<
whitequark[cis] >
so any hypothetical QDRBuffer should also be a sound abstraction or it shouldn't be there
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23:17
<
whitequark[cis] >
isn't that more concisely put as stream.Signature(Inputs)?
23:17
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whitequark[cis] >
when in doubt, look at Amaranth docs
23:17
<
whitequark[cis] >
though
23:18
<
whitequark[cis] >
where the entire code is in the returns section
23:22
<
cr1901 >
Okay, perfect. Didn't think to use the :py: role. Will fix.
23:25
<
whitequark[cis] >
that's actually a custom role amaranth defines
23:25
<
whitequark[cis] >
look in conf.py
23:39
<
cr1901 >
Adding a role like that via rst_prolog, doesn't work with MyST, but I'll keep that in mind for the future