whitequark[cis] changed the topic of #amaranth-lang to: Amaranth hardware definition language · weekly meetings: Amaranth each Mon 1700 UTC, Amaranth SoC each Fri 1700 UTC · play https://amaranth-lang.org/play/ · code https://github.com/amaranth-lang · logs https://libera.irclog.whitequark.org/amaranth-lang · Matrix #amaranth-lang:matrix.org
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<cr1901> whitequark[cis]: Approx how many LUTs/FFs does a minimal 1xSPI stream of yours take?
<whitequark[cis]> this stream-based PHY is actually QSPI-only
<whitequark[cis]> i.e. it does not have an SPI-only option; it can always be used in 4X mode at runtime (and 2X)
<cr1901> How many LUTs/FFs does it take in 4xSPI mode then?
<whitequark[cis]> i haven't synthesized it yet
<whitequark[cis]> this is all done in simulation
<whitequark[cis]> debugging pipelining issues where you aim for 100% cycle utilization on hardware is so difficult as to be practically unviable
<cr1901> If it's small enough, I have an idea to replace the contrived sentinel demo I have in repo w/ something more useful (music player)
<whitequark[cis]> it's very heavily optimized
<cr1901> Just hit the SPI flash hard enough to stream in samples, manipulate them, and output to a delta sigma DAC (or if I'm incredibly lazy, bitbang I2S, and make the user provide the sound device)
<whitequark[cis]> ooh, right
<whitequark[cis]> I2S is another excellent candidate for this methodology
<whitequark[cis]> okay, i'm done with my re-engineered IOStream, QSPIEnframer, and QSPIDeframer
<whitequark[cis]> time to make QSPIClocker and QSPIBusController
<whitequark[cis]> or maybe QSPIClocker as a separate module doesn't make sense... hm
<_whitenotifier-9> [amaranth] whitequark opened issue #1416: Add a way to have fine grained control over `oe` for `io.Buffer`, `io.FFBuffer`, `io.DDRBuffer` - https://github.com/amaranth-lang/amaranth/issues/1416
<_whitenotifier-9> [amaranth] whitequark opened issue #1417: Add a `PortLike` that can be used in simulation to test designs which instantiate I/O buffers - https://github.com/amaranth-lang/amaranth/issues/1417
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<whitequark[cis]> huh, clocking was surprisingly easy
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<whitequark[cis]> the new design works perfectly
<whitequark[cis]> that's running a command and then doing an X4 read without a single wasted cycle
<tpw_rules> nyaaaaan
<tpw_rules> but in utf16?
<whitequark[cis]> watch valid
<tpw_rules> or is that like good and bad nybble alignment
<tpw_rules> how is the new testbench api working out
<whitequark[cis]> it's excellent
<whitequark[cis]> there are a few new pitfalls (mainly, if you are doing assert ctx.get(...) == ... you must do so before any ctx.set() in case you have comb feedback in the design, and you also must use ctx.tick().sample() if you want to interact with streams
<tpw_rules> what about streams causes the last thing?
<whitequark[cis]> it's not stream-specific, it's also about comb feedback
<tpw_rules> don't you have to sample signals specifically? i guess the stream you would sample?
<whitequark[cis]> it's just that you can get away with sampling at only approximately the right time in many cases (like flags) but you have to get things right if you have a dense flow of data through a stream
<tpw_rules> are these in the docs yet?
<whitequark[cis]> what are "these"?
<tpw_rules> these new pitfalls
<whitequark[cis]> that sounds like a work question. I'm on vacation so you won't get an answer
<tpw_rules> fair enough
<tpw_rules> excited to try it out
<whitequark[cis]> nice :3
<whitequark[cis]> the QSPI gateware works very well :D
<Darius> whitequark[cis]: victory!
<whitequark[cis]> the main annoyance was that the w25q32 doc lied to me
<Darius> impossible
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<cr1901> (Python by default will suppress DeprecationWarning outside of main. This includes doctests. Putting "warnings.simplefilter("default")" in my sphinx conf.py fixes this
<cr1901> I def welcome other solutions tho
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<_whitenotifier-9> [yosys] qarlosalberto commented on issue #35: frontend error - https://github.com/YoWASP/yosys/issues/35#issuecomment-2183249369
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