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<
jfng[m] >
<_whitenotifier-9> "[amaranth-stdio] jfng opened..." <- hm, the CI seems to be stuck
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<
jfng[m] >
fixed, GHA got disabled because -stdio was stale for >60 days
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_whitenotifier-9 >
[amaranth-lang/amaranth-stdio] jfng 91807da - tests: migrate to the new amaranth.sim API.
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_whitenotifier-9 >
[amaranth-lang/amaranth-lang.github.io] github-merge-queue[bot] 2928dde - Deploying to main from @ amaranth-lang/amaranth-stdio@91807daf8376a88626d1ca11ef352f250b068c34 🚀
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whitequark[cis] >
out of curiosity why do this and not um
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whitequark[cis] >
0b111_00_00_001_0
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whitequark[cis] >
but i'm actually unsure (and this makes me happy we finally have a way to do feedback without artificial delay cycles)
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jfng[m] >
<whitequark[cis]> "out of curiosity why do this and..." <- for readability; you can see which bits goes in each field at a glance
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whitequark[cis] >
makes sense
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jfng[m] >
WB writes will have two cycles of latency (i.e. `len(wb_bus.sel) + 1` cycles)
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jfng[m] >
i am tempted to add some `ctx.delay(1e-7)` before asserting comb feedbacks in order to improve readability of the VCD file upon failure
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whitequark[cis] >
ahhh'
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whitequark[cis] >
* ahhh
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whitequark[cis] >
jfng[m]: so, there is fs_per_delta= argument of write_vcd
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