00:52 <_whitenotifier-8> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://github.com/YoWASP/yosys/compare/a5144b8c873f...3cac299736dd

00:52 <_whitenotifier-8> [YoWASP/yosys] whitequark 3cac299 - Update dependencies.

01:17 <_whitenotifier-8> [YoWASP/nextpnr] whitequark pushed 1 commit to develop [+0/-0/±2] https://github.com/YoWASP/nextpnr/compare/054df2fbe868...cfcdeb279a27

01:17 <_whitenotifier-8> [YoWASP/nextpnr] whitequark cfcdeb2 - Update dependencies.

06:35 <d1b2> <Nate> hm, maybe a yosys synth_nexus / memory inference issue, but it seems amaranth AsyncFIFO and SyncFIFOBuffered outputs are '0 when their depth is > 16 on a CrossLink-NX device (despite simulation looking OK)), whereas SyncFIFO works with reasonably larger depth (e.g. 4096) (width=32 here). However, I noticed that SyncFIFO causes yosys to infer LUTRAM (less than desirable w/ 4k elements). Tips are most appreciated (in the mean time, will make

06:35 <d1b2> an MRE, and maybe test on an iCE40).

12:05 <_whitenotifier-f> [rfcs] tilk commented on pull request #11: Minimal type annotation support - https://github.com/amaranth-lang/rfcs/pull/11#issuecomment-1552956469

13:57 <_whitenotifier-f> [rfcs] whitequark commented on pull request #11: Minimal type annotation support - https://github.com/amaranth-lang/rfcs/pull/11#issuecomment-1553099997

15:38 <crzwdjk> I think the FIFOs just uses Memory under the hood, on iCE40 that becomes a BRAM generally.

15:39 <whitequark> it sounds like a crosslink-nx synthesis or pnr issue