01:59 <_whitenotifier> [amaranth-boards] JarrettBillingsley commented on issue #207: Upgrading from nMigen and cannot get amaranth-boards installed - https://github.com/amaranth-lang/amaranth-boards/issues/207#issuecomment-1328151336

03:22 <Guest48> is there a way to define an instance from a verilog file? Something like Instance_from_file("foo.v").

03:23 <Guest48> Of course it can do port inference and allow me say: "give me all axi initiator interfaces" etc it would be great.

03:25 <Guest48> similarly if I can interrogate the parameters of the module etc. it would be nice.

03:26 <tpw_rules> you're familiar with regular Instances, right?

03:26 <Guest48> other than one example I saw, not really. I'm very new to nmigen/amaranth.

03:27 <Guest48> what can I read, what examples exist?

03:29 <tpw_rules> https://lab.ktemkin.com/post/nmigen-instance/

03:44 <Guest48> that's the example I saw. I don't want to type in the ports, parameters, attributes etc. I want them to be parsed/inferred from the verilog file; like if you have 5 ready-valid channels with these suffixes & directions, it might be an axi-initiator etc.

03:44 <tpw_rules> afaik that's not possible

03:45 <Guest48> Basically I'm looking for something like magma's m.define_from_verilog_file

03:46 <Guest48> It would be a great feature if it existed and would make integration much easier.

03:48 <Guest48> has anyone looked at https://github.com/sifive/duhportinf

05:11 <Guest48> another q: has anyone written something like a datamover in amaranth?