<lofty>
philtor: anyway, if you open the docs, you can find a description of the architecture, and in particular the "LUT trees", which are certainly one of the FPGA architectures of all time
<philtor>
Looks like their dev boards are $250 from digikey
<philtor>
I think I'd probably lean towards ECP5 board (ULX3S) which is about 1/2 that price.
<lofty>
I mean, sure, but you wanted "new" stuff, and I think it's a little difficult to qualify the ECP5 as new
<philtor>
Yeah
<lofty>
It sounds a little stupid to say, and god knows I've had my frustrations with them
<lofty>
But there's a wave of "indie FPGA" for whatever one might define as not {Altera, Xilinx, Lattice}, and I think it's healthy to encourage diversity in this stuff
<philtor>
I guess Nexus is Lattice's 'new' FPGA
<lofty>
Yeah, it's the family intended to replace both ECP5 and iCE40
<philtor>
It's supported by Yosys?
<philtor>
(or has yosys support)
<lofty>
And nextpnr.
<lofty>
I think the main challenge is that it's off to a...pretty slow start
<philtor>
any dev boards?
<lofty>
A few from Lattice. Too new to see much interest or uptake from the open community because the ECP5 is generally good enough.
<lofty>
(lattice have something of a problem of their old product lines eating their new)
<philtor>
Yeah, looking at their site there seems to be a lot of confusing fragmentation
<lofty>
The nexus family is basically the same underlying fabric with different sizes and features
<philtor>
searches for nexus fpga development boards point to CertusPro-NX
<philtor>
Seems to be a lot of stuff on those parts like SERDES, etc, that I'm not interested in much. I'd just like a lot of fabric.
<lofty>
How "a lot" is "a lot"? :p
<philtor>
and those boards are $450 which is even worse than the GateMate board
<lofty>
They're also probably bigger than the gatemate chip, although that's a really blurry comparison
<philtor>
"a lot of": well, maybe the larger ICE40s would suffice.
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<lofty>
Protip: there is no 12k ECP5 die
<lofty>
It may say 12K on the part number, but it's actually 25K.
<lofty>
But you didn't hear that from me.
<philtor>
Looking at doing some bitnet testing (the 2bit weight transformer) with an... unorthodox RISC-V implementation.
<philtor>
which is why I don't care much about peripherals like SERDES, MIPI, etc. on the FPGA
<lofty>
I've been in the open hardware community enough that orthodox RISC-V implementations feel like the exception
<lofty>
(microcoded RISC-V, anybody?)
<lofty>
(and I have my own sketch of a dumb RV core)
<philtor>
yeah... well this one is pretty out there. Not my idea, but kind of interesting. Can't say a lot about it. Dynamically modifiable microcode is part of it.
<philtor>
But there's more than the RISC-V piece hence the need for gates... or LUTs.
<philtor>
Oh, hmmm... maybe the GateMate would actually be good for this "Each CPE is configurable as a 2-bit full-adder or 2×2-bit multipliers " that's kind of right up our alley.
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<lofty>
philtor: you're trading off potential performance for flexibility, but then there are limits to performance anyway.
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<philtor>
lofty: is yosys able to take advantage of these GateMate features? (configuring CPEs as 2bit full adders or 2x2 multipliers)
<lofty>
Yes, it can even make use of the mux4 capability
<tnt>
Isn't yosys their official tooling ? If so I'd hope it can use all their features :)
<lofty>
It's their official *synthesiser*
<tnt>
well yeah, yosys never does pnr or did you mean something else ?
<lofty>
I've seen enough people use "supported by Yosys" to mean "supported by Yosys and nextpnr" that I prefer to make the distinction clear
<tnt>
Ok fair enough. I know the distinction :D
<lofty>
Like, you need their proprietary place and route tool; yes, you could say it's supported by Yosys, but that's not always what people are actually asking for
<tnt>
I know. I wish their pnr tool was oss too ... or better just nextpnr alas ... it's neither.
<tnt>
At least it's no longer a win32 binary they tell you to run on wine ...
<tnt>
so I guess it's "progress"
<lofty>
[20:03:43] tnt: I know. I wish their pnr tool was oss too ... or better just nextpnr <--- ;)
<lofty>
(though from what I've heard, even if they opened their tooling, it would probably not be so great)
<tnt>
:)
<philtor>
Hmm... their doc has a diagram that points to the pnr part of the flow and says "nextpnr arch planned in 2023"
<lofty>
unfortunately we at yosyshq have our hands full with a different nextpnr arch presently, so, uh
<philtor>
so what you're saying is that while yosys (the synthesis part) may work well with GateMate, the P&R story isn't great.
<lofty>
I personally have no experience with GateMate's P&R, so I can't say anything either way
<philtor>
Some aspects of the arch look really suitable for what I'm trying to do (help someone with an idea get a working POC so he can persue funding), but other aspects give me pause.
<lofty>
like that P&R tooling, I assume
<philtor>
yeah, sounds like it's kind of a questionmark at this point, like is it even really a working flow?
<lofty>
I believe so
<lofty>
(I also think part of the P&R story is they based it off somebody else's code and they do not have permission to release it)