15:56 <bvernoux> azonenberg, I do not really understand why bring the Beatty line vs a TRL cal kit

15:56 <bvernoux> why->what

15:58 <bvernoux> azonenberg, I have received my v0.5 TRL Test/Cal board from JLCPCB to test JLC7628 which is Impedance controlled

15:58 <bvernoux> I will do some test I have mainly improved the mask on SMA connector to better solder it ...

15:59 <bvernoux> I'm also building a Dual LISN 5uH for information based on EEVBLOG Forum LISN but mine is released on GitHub as looking for the files on the forum is a real mess

16:00 <bvernoux> For more details https://github.com/bvernoux/EMC_5uH_LISN

16:00 <bvernoux> there is an issue to discuss about future improvements on the LISN

16:26 <bvernoux> What a crazy world chip shortage is worse and worse everyday it was mainly MCU/CPU but now it is again on some passive like Diode 1N4148W which are planned to be available in 2022 ...

20:11 <azonenberg> The beatty is mostly for fun but will also be nice for doing some characterization on the PCB to see how closely it matches sim in terms of Er, Df, velocity factor, etc

20:47 <Stephie> j

20:50 <azonenberg> The other thing I added to the test board was an 0402 passive footprint and a 2x thru standard

20:51 <azonenberg> so i can do de-embedded characterizations of a single 0402 series passive

20:51 <azonenberg> Then i still want to spend some time figuring out how to do a TDR-to-sparam filter

20:52 <azonenberg> But before i do that i have some work to do on averaging to get lower noise data