<thejpster[m]>
I think I’d have two enums - a set of readable and a set of writeable and then a “Addr“ trait that is implemented for both.
<thejpster[m]>
But also I think there are crates to help with this.
<gaivs[m]>
yeah i tried to look for some crates helping with this, but didn't find any (or more likely I didn't know what to search for). but yeah, I guess that makes sense, thank you!
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<barafael[m]>
is there a way to get async GPIO on raspberry pi? Not the pico type
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<i509vcb[m]>
Gotta love it when the vendor's SVDs have literally everything, including stuff not even noted in the datasheet
<i509vcb[m]>
Like registers for trim values that don't exist in the datasheet
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<jduck[m]>
<gaivs[m]> "this might be more of a rust..." <- > <@gaivs:matrix.org> this might be more of a rust language question than a rust embedded question, but I figured someone here might have looked into this before.... (full message at
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<balbi[m]>
Wonder if anyone has a suggestion for this particular scenario. I have the SVD for a given MCU and I'm trying to have svd2rust generate better code by further describing the gpio blocks. All blocks are exactly the same except for some details in the documentation which states that e.g. in GPIO3, bits 5 and 2 of the direction register must be set to 1. The HW doesn't enforce that, but they must be set to one.
<balbi[m]>
I wrote the SVD such that I fully described GPIO0 and made all other GPIO blocks be `derivedFrom` GPIO0. The direction register is a 8 bit register where each bit maps to a pin within that instance. For that, I used a single field with `dim` set to 8 and `bitWidth` set to 1.
<balbi[m]>
Is there a way to tell the field that bits 5 and 2 should be 1 always? I suppose setting `resetValue` to `0x24` is part of the solution, but then I would also need those bits to be read-only. Is that possible with SVD and `svd2rust`?
<dirbaio[m]>
not possible, no
<balbi[m]>
I suppose it's an SVD limitation?
<dirbaio[m]>
out of scope I'd say? SVD just describes registers
<balbi[m]>
What would be the best approach here? Handle that in the HAL?
<dirbaio[m]>
vs this is more a higher level configuration thing, like "this bit must be 1 or the hardware will misbehave"
<dirbaio[m]>
similar to "clock freq must be at most 120mhz or the hardware will misbehave"
<dirbaio[m]>
or "don't use SPIM1 and SPIS1 at the same time"
<balbi[m]>
okay, so take note and handle it in the HAL, I guess.
<dirbaio[m]>
i'd just do it in the hal yep
<dirbaio[m]>
svd/pacs just document what registers/fields "exist", imo the "safety" things are a HAL thing
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<RockBoynton[m]>
Anyone check out or use https://crates.io/crates/hopter yet? I thought it was interesting that it uses a customized compiler
<thejpster[m]>
When can I have libcore compiled with MVE?