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<ubernerd[m]> <bartmassey[m]> "Do we have a Matrix channel..." <- I'm a beginner who would love a spot to dump my really dumb questions. (I'm also picking up rust at the same time, as my first 'real' language, so there are going to be some doozies. If there is a community for new to rust people in general, point me that way…)
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<SArpnt[m]> <ubernerd[m]> "I'm a beginner who would love..." <- you probably want the rust matrix space, it has a regular non-embedded rust chat that's s lot better for beginner questions
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<thejpster[m]> A client pointed me at this today: https://docs.rs/volatile/0.6.1/volatile/index.html
<thejpster[m]> Contains a useful short description of why VolatileCell is unsound.
<thejpster[m]> it's from Phil Opperman, the blog-os author.
<JamesMunns[m]> I feel like Lokathor has a good explanation in the volatile crate he wrote
<JamesMunns[m]> ah, maybe no explanation: https://docs.rs/voladdress/1.4.0/voladdress/
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<JamesMunns[m]> yep. I know Lokathor explained it in many places, but phil-opp's explanation is a good reference.
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<diondokter[m]> Ok, just for reference, if you use an RP2040 and want your boot2 to do an integrity check on your flashed data that comes after it and want it to drop back to the USB bootloader if the flash is not correct, then I have bad news for you. It doesn't work.
<diondokter[m]> The RP2040 has a rom function to do the jump to the usb bootloader for you, but it appears that it only works if the USB and/or some clocks are already initialized. It doesn't do it for you. It's not documented that it does, but it's also not documented that you have to do it yourself.
<diondokter[m]> Doing the init in boot2 won't work because you simply don't have the space for it.
<diondokter[m]> So from boot2 you can't directly follow the red line
<dirbaio[m]> maybe you can make boot2 erase itself, then reboot?
<diondokter[m]> Yeah, I've considered that. That would be possible. However, it also works if we change our flashing procedure. That's kinda hacky.
<diondokter[m]> But to make the extra code fit in boot2 I already had to do über hacks. So it's not necessarily better
<dirbaio[m]> strange that you can't set some magic flag in RAM to tell the bootrom to force enter usb boot
<diondokter[m]> Yeah
<dirbaio[m]> seems like a quite basic feature that all bootloaders would want
<dirbaio[m]> 👻
<dirbaio[m]> is this for a finished, end-user product? if so you might want to write your own dedicated bootloader?
<dirbaio[m]> so you're not so space-constrained, and you can add extra checks to it like a crc check, or signature checks, or check the firmware is for that product and not some arbitrary uf2 that might damage it (?)
<diondokter[m]> Well, not sure how much I can say because I'm under NDA.
<diondokter[m]> But a bootloader would require factory-flashing and they want to avoiid that an push the firmware over usb in the field
<diondokter[m]> s/avoiid/avoid/
<dirbaio[m]> or so it can still have its own vid/pid so your desktop tool can distinguish it from a random pico
<diondokter[m]> So you need to worry about power outages
<diondokter[m]> And half-flashed firmwares
<dirbaio[m]> yeah... but you still do if you use the bootrom
<dirbaio[m]> making boot2 check the rest of flash won't save you if boot2 itself is corrupted
<diondokter[m]> Oh, but boot2 has a checksum that is checked by boot1
<dirbaio[m]> ah maybe not because the bootrom checks boot2 hash
<dirbaio[m]> yeah yeah
<dirbaio[m]> avoiding factory flashing is such an odd requirement tho 🤣
<dirbaio[m]> i'm sure it has its reasons :D
<diondokter[m]> Mostly cost reduction I think
<dirbaio[m]> but surely you're doing some form of factory testing... and that likely means connecting over usb/swd to run some test firmware anyway
<diondokter[m]> No idea how they do that
<diondokter[m]> It's a bit of a weird product though
<dirbaio[m]> and if you do you might as well spend a few ms more to flash a ~16kb bootloader 🤷
<diondokter[m]> All I'm gonna say haha
<dirbaio[m]> sounds weird indeed :D
<dirbaio[m]> fun!
<diondokter[m]> It is fun yeah! Not your typical IoT setup
<JamesMunns[m]> wait, but if it's fresh from the factory
<JamesMunns[m]> you won't have ANY boot2, right?
<JamesMunns[m]> so it'll go straight to usb boot?
<diondokter[m]> Yes, see the diagram I posted
<diondokter[m]> That diagram is what boot1 does
<JamesMunns[m]> right, but if the goal is to avoid factory programming, job done, right?
<diondokter[m]> Yeah, well the problem is that if something goes wrong during flashing and you have a corrupt flash, the boot2 might be intact
<JamesMunns[m]> device boots for the first time, you detect it's booted in rp2 boot, shove a firmware at it?
<diondokter[m]> But what happens if you shove half a firmware at it? It breaks and doesn't go into usb bootloader anymore and you can't fix it
<JamesMunns[m]> I would highly recommend your customer not powering on the MCU for the first time in the field :D
<diondokter[m]> Well
<diondokter[m]> I think this can be made reliable though
<JamesMunns[m]> (but then yeah, I'd probably say write a boot3 that you never overwrite, which boot2 always goes for. But you know your customer better than I do :) )
<diondokter[m]> > But you know your customer better than I do
<diondokter[m]> Not so sure about that haha
<JamesMunns[m]> Sympathies tho that sometimes customers ask for silly things :)
<diondokter[m]> * > But you know your customer better than I do
<diondokter[m]> Not so sure about that haha
<JamesMunns[m]> diondokter[m]: > <@diondokter:matrix.org> > But you know your customer better than I do... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/KPpbXbVMWFOESmutedgGQYdT>)
<dirbaio[m]> customer doesn't know themselves well enough
<diondokter[m]> In any case, STM chips do all this way better IMO
<JamesMunns[m]> oh?
<diondokter[m]> Their bootloader is pretty solid and you can play with them much more
<JamesMunns[m]> The built in DFU doesn't check integrity, does it?
<JamesMunns[m]> you can reboot halfway through a DFU, and have a bricked device too
<dirbaio[m]> I think it can check if you use their secure boot bullshit or something
<JamesMunns[m]> or rather: it doesn't integrity check before it boots, it might do so while flashing
<diondokter[m]> Yeah, but they have more config options to how and where it boots to
<dirbaio[m]> but still imo for stm32 you probably want to do your own bl anyway
<diondokter[m]> Say you keep the boot pin high on the PCB, then it will always go to the bootloader.... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/aCmUlkAWQoRQddREiaHKITwo>)
<diondokter[m]> Though idk what happens if you cut the power right when it changes that address. Something we need to test I guess
<JamesMunns[m]> diondokter does your usb host have say, a single GPIO or two that could be used to force a reboot and USB boot?
<diondokter[m]> No
<JamesMunns[m]> lmao what
<diondokter[m]> There are things, but that definitely falls under NDA :P
<JamesMunns[m]> fair, no need to share NDA stuff. My condolences.
<diondokter[m]> * are things that mitigates stuff, but
<diondokter[m]> Look, it's not as bad as it looks hahaha
<diondokter[m]> It's a pretty nice system IMO
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<burrbull[m]> <thejpster[m]> "A client pointed me at this..." <- > <@thejpster:matrix.org> A client pointed me at this today: https://docs.rs/volatile/0.6.1/volatile/index.html... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/icgnGPmdBYfOofsnVkrVMNNS>)
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<birdistheword99[> Quick question (hopefully), looking at the STM32H7 docs there is a dedicated 128k DTCM region at the lowest RAM address (0x20000000) which seems like the ideal place for the stack, but I am using flip-link to invert the stack, so I am not sure where that stack will actually be placed if I were to put this into my memory.x file:... (full message at
<birdistheword99[> s/Script//, s///
<dirbaio[m]> the default linker script from cortex-m uses a single memory region called "RAM"
<dirbaio[m]> and places .data, .bss, .uninit starting from the start of RAM, and the stack starting from the end of RAM
<dirbaio[m]> so if stack grows too much it crashes into .data/.bss/.uninit, which is the problem flip-link tries to solves
<dirbaio[m]> s/solves/solve/
<dirbaio[m]> if you do a custom linker script that does, e.g. place .data/.bss/.uninit in SRAM2-4, and stack starting from the end of SRAM1, then you don't need flip-link
<dirbaio[m]> * if you do a custom linker script that does, e.g. place .data/.bss/.uninit in SRAM1-4 or AXISRAM, and stack starting from the end of DTCMRAM, then you don't need flip-link
<dirbaio[m]> because if it grows too much it'll crash into 0x2000_0000 and hardfault anyway. it won't crash into .data/.bss/.uninit
<JamesMunns[m]> Just for anyone else out there, the thing that `flip-link` does which is magic is *automatically sizing* the stack.
<JamesMunns[m]> You don't need flip-link if you're willing to statically "declare" your maximum stack size.
<JamesMunns[m]> flip link automatically gives you *the maximum stack size minus your globals*, which you can't do with a single linker pass.
<JamesMunns[m]> But if you say "all of DCTM is stack", or "stack is max 64K", you can do it as dirbaio explained.
<birdistheword99[> dirbaio[m]: Thanks, I'll do that then! Will the linker detect if I overflow the static data sections when it compiles?
<dirbaio[m]> birdistheword99[: yep it will
<dirbaio[m]> yeah flip-link is nice when you have a contiguous ram region and want to maximize stack usage to not waste ram
<dirbaio[m]> but h7's ram is not contiguous anyway 🥲
<birdistheword99[> Brilliant, thanks for the info guys!
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<Ralph[m]> the kinematics behind it are quite nice!
<Ralph[m]> (full disclosure: the guy who did this is a lecturer of mine; he showed the video in one of his robotics lectures a while ago)
<Ralph[m]> completely rust unrelated, but i thought some of you might enjoy this little demo of how four actuators can control a bird tail: https://www.youtube.com/watch?v=f4fyyloXg70
<jannic[m]> <diondokter[m]> "Ok, just for reference, if you..." <- > <@diondokter:matrix.org> Ok, just for reference, if you use an RP2040 and want your boot2 to do an integrity check on your flashed data that comes after it and want it to drop back to the USB bootloader if the flash is not correct, then I have bad news for you... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/BdnwQzRLCDptiqljcqBlfgca>)
<jannic[m]> Ouch, my memory is bad. Now I know why this question felt familiar: https://github.com/raspberrypi/pico-bootrom/issues/3
<birdistheword99[> s/Linker/ld/, s/Script//, s///
<AlexandrosLiarok> Hi all. Just published https://crates.io/crates/fieldset which I use for my synthesizer project. I built it as an alternative to the intrusive lists notification that I used in the C++ version.
<AlexandrosLiarok> Thought it may be useful to others as well.
<AlexandrosLiarok> It is a bit rough around the edges but hopefully still useful.
<diondokter[m]> <jannic[m]> "Ouch, my memory is bad. Now I..." <- Oh lol hahaha. Wish I knew that earlier
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<FreeKill[m]> Hello - Do any of you have an open recommendation of a tracing tool in the vein of Segger SystemView?
<FreeKill[m]> It feels like with RTT hooked up such a thing should exist, but I don't know of any myself
<FreeKill[m]> * Hello - Do any of you have a recommendation of an open tracing tool in the vein of Segger SystemView?
<diondokter[m]> <FreeKill[m]> "Hello - Do any of you have an..." <- Not sure what you mean with open tracing tool?
<FreeKill[m]> It shows when you entered/exited RTOS tasks or IRQs
<diondokter[m]> Ah I see
<FreeKill[m]> this sorta thing
<diondokter[m]> Yeah seems useful. I don't know of any. But I've often mused making myself one based on probe-rs
<diondokter[m]> Funny thing is that aside from the UI, it's not even that complicated
<FreeKill[m]> oh for sure
<FreeKill[m]> once you have RTT its not much at all
<diondokter[m]> You'd probably want to use the cortex-m tracing capabilities too
<FreeKill[m]> That's substantially slower than rtt I believe
<FreeKill[m]> But it does auto timestamp
<diondokter[m]> Yeah and doesn't need any code changes
<FreeKill[m]> What do you mean by that?
<diondokter[m]> Well...
<diondokter[m]> Hmmm, maybe I don't know enough about it.
<diondokter[m]> If through RTT, what is writing to RTT to emit e.g. interrupt status events?
<FreeKill[m]> Well indeed, it would need to be instrumented
<FreeKill[m]> Manually perhaps
<FreeKill[m]> Does cortex m offer something automatic for that??? I was only thinking of ITM SWO
<diondokter[m]> Yeah that. There's also ETM, which I think is similar but has some parallel lines. Not all chips have that
<FreeKill[m]> Cool!
<FreeKill[m]> For task instrumentation it definitely needs me to done manually too (though I appreciate that's probably more of a C concern)
<GrantM11235[m]> Have you looked at [rtos-trace](https://crates.io/crates/rtos-trace)? I haven't used it, but I know embassy-executor supports it
<FreeKill[m]> I have not - looks like a mid layer that backs on to system view?
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<adamhott[m]> hey all, I've got a defect in a board that connects some daisy chained leds that just have CLK and DATA IN and OUT. I believe the defect is the routs between the CLK and DATA OUT to the next led's CLK and DATA IN. Is there anyway to manually repair this, like cut the routes down with a scalpel and then I don't know what next to do?
<adamhott[m]> Strip a wire and lay it down on the copper and solder it in place on the route?
<adamhott[m]> Has anyone done this before successfully?
<GrantM11235[m]> That would work if the problem is a broken trace, but it won't fix it if the trace is shorted out
<adamhott[m]> I'm pretty sure it's a a broken trace due to the pcb layout
<GrantM11235[m]> You can use your multimeter to check if the trace is shorted or broken
<adamhott[m]> the route is at a very extreme angle
<adamhott[m]> thanks!
<GrantM11235[m]> There are a lot of videos on youtube about pcb repair. It's harder than basic soldering, but it's not impossible
<adamhott[m]> I'm up for a challenge!
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