sorear changed the topic of #riscv to: RISC-V instruction set architecture | https://riscv.org | Logs: https://libera.irclog.whitequark.org/riscv
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<geist> hmm, question: is there a plan for some sort of standardized support for MSIs on PLIC based interrupt controlelrs?
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<geist> I dont see any reference to it in the plic spec, nor do I see any particular mechanism in the qemu virt machine for riscv
<geist> the pending register in the plic *almost* gets what you want but it's not writable
<sorear> on the current platforms MSI doorbells are provided as part of the PCIe root complex, not the PLIC
<sorear> unsure if that changes with the advanced interrupt controller work
<geist> ah. was just thinking that. linux doesnt seem to have any support for it at the moment so unclear if it's present in any real hardware
<sorear> if you mean AIC I have no idea if it's a real/credible thing
<geist> i dunno! I was just expecting there to be a doorbell int he plic and was surprised to not see it
<sorear> given that the doorbell seems to be a standard feature of the cadence pcie block that may have been deliberate at the time
<geist> yah. and since qemu virt machine is not emulating a particular pcie controller it seems (there are no pci controller registers) there's no fallback solution
<sorear> hmm, i thought virt did have pcie interrupts
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<geist> not as far as i can tell. or at least the llinux 5.8 kernel i have running in one doesn't do MSI
<geist> it has the standard swizzled 4 legacy irqs though, of course
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<Finde> afaik the PLIC doesn't do it and is meant to die, APLIC/AIA are meant to take over but I think only AIA does MSIs (not 100% sure on that)
<Finde> worth reading the spec drafts: https://github.com/riscv/riscv-aia
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<geist> Finde: ah thanks. that's kinda the meta info i was really looking for: what the direction standard interrupt controllers are going in on riscv (if any)
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<[exa]> hi everyone! Are there some good learning&teaching tools/guidelines for risc-v low-level programming? I'd love say a small platform that can run code in qemu and communicate on a serial port, ideally controlled relatively easily with assembly
<la_mettrie> i've been trying such stuff with longan nano but haven't got far yet. they're so cheap that it's pretty safe to try. there's probably no good assembly guides available for risc-v at the moment. with previous assembly experience it's easy to get started with whatever you find from the web though
<muurkha> what did you think of the risc-v assembly programmer's manual
<muurkha> yeah
<la_mettrie> it's pretty short...
<muurkha> aye
<la_mettrie> those official ISA manuals are pretty good source of information. pdf by indian Shakti company is usable for the user level stuff (though it mostly copies official manuals, it also gives some practical examples).
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<\dev\ice> la_mettrie: i'm playing with longan nano now :-)
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<gordonDrogon> [exa], I decided to learn by reading the docs from riscv.org and writing my own emulator. This is not everyones cup of tea though!
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<[exa]> thanks for suggestions
<[exa]> like, the assembly is in fact the easy part, more like where to get the tooling
<[exa]> but I found a howto for running qemu and there's a pretty nice support for starting linux-like kernels and lots of resources
<[exa]> this should do for some time :D
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<gordonDrogon> [exa], my target is RV32... although it did take me a while to get the compiler to output the right thing on my Linux system.
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