whitequark[cis] changed the topic of #prjunnamed to: FPGA toolchain project · rule #0 of prjunnamed: no one should ever burn out building software · https://prjunnamed.org · https://github.com/prjunnamed/prjunnamed · logs: https://libera.irclog.whitequark.org/prjunnamed
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<povikMartinPovie> can the get method return &'a str right away?
<povikMartinPovie> there must be some advantage to Ref<> which I don't know
<jix> so a RefCell tracks shared / mutable borrowing dynamically at runtime, for that it needs to know how long a borrow lasts, so it doesn't give you a direct reference but a wrapper that will update the refcell state when dropped
<jix> (unless I missed some context and this is a different kind of Ref)
<povikMartinPovie> no, you're right
<povikMartinPovie> the Ref::leak documentation is informative: https://doc.rust-lang.org/std/cell/struct.Ref.html#method.leak
<povikMartinPovie> this is minerva placement with best-effort hierarchy preservation which isn't an optimization boundary
<povikMartinPovie> color-coding corresponds to modules
<povikMartinPovie> you won't see this anywhere else :)
<povikMartinPovie> the key
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<widlarizerEmilJT> Awesome, how do you decide which level to attribute a mapped cell to?
<povikMartinPovie> the most specific scope common to the preimage for a mapped cell
<povikMartinPovie> actually I keep all the scopes on the mapped cell, but the Verilog export at the end chooses the commonest one