klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<Jarjarbinks--> hi
<vdamewood> Jarjarbinks--: Hai
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<poyking16> make
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<clever> make clean
<mrvn> make all
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<zid> ./configure --without-heat
<mrvn> ./configure --with-cool
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<clever> ./configure --with-hvac
<poyking16> I typed make into the wrong terminal
<mjg> gmake
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<vdamewood> cmake ../../src/myos -GNinja
<poyking16> no cmake only makefiles
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<vai> https://journals.plos.org/ploscompbiol/article?id=10.1371/journal.pcbi.1005268#pcbi.1005268.ref009
<bslsk05> ​journals.plos.org: Could a Neuroscientist Understand a Microprocessor? | PLOS Computational Biology
<mrvn> Maybe he understands it. But could he build one?
<gog`> it's not computer surgery
<vdamewood> Interestingly, the first person I pictured when I read Neuroscientist was Mayim Bialik
<bslsk05> ​'Brain Surgeon - That Mitchell & Webb Look , Series 3 - BBC Two' by BBC (00:02:09)
<gog`> lmao
<gog`> good sketch
* vdamewood gives gog` a fishy
* gog` eat fisht
<lkurusa> Stackoverflow is down - engineers' productivity all across the globe is near zero
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<gog`> we need to decentralize our crib code
<gog`> web4.20.69 it
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<GeDaMo> mrvn: can you build one? :|
<bslsk05> ​'I, Robot - Human emotions scene' by Facundo Verdun (00:01:52)
<mrvn> GeDaMo: barely
<GeDaMo> I might be able to design one but building one is beyond me :P
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<gorgonical> Friday afternoon off-topic: I have just learned that the only trappist brewery in the US has ceased production. This will stifle my plans to try all the trappist beers
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<mrvn> better hurry before they are sold out
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<mjg> what's armistas. are there any perf tricks on 64 bit arm for spin unlock?
<mjg> say spinlock is a 4 byte word which needs to be replaced with 0
<mjg> i'm asking since amd64 gets away without even doing an atomic op or posting any fences
<clever> i would say that if you just want to set it to 0, and you already hold the lock, then just do a 32bit store, your done
<mjg> but what about the release fence?
<clever> the rules say that your holding the lock and nobody else can write to it until you release it
<mjg> is an explicito ne needed?
* zid dies twice
<zid> you're
<mjg> man i'm talking abou implementation of spin unlock
<mjg> not how to handle data while holding a spinlock
<mjg> on 64 bit arm specifically
<clever> as far as i know, barriers arent required
<clever> a load from another core i dont think would conflict in any bad way?
<mjg> you definitely want to emit all stores *before* you announce the lock as up fro grabs
<clever> yeah, thats a seperate issue
<clever> you dont want the protected data being modified after the release
<mjg> x86_64 has strong enough ordering that htis happens anyway
<mjg> what about arm
<clever> so you would need a barrier between the data and the release
<zid> arm's memory model is super weak isn't it
<zid> so you'd need barriers to stop the writes escaping the spin unlock
<zid> and appearing to have happened afterwards
<clever> yeah
<bslsk05> ​en.wikipedia.org: Memory ordering - Wikipedia
<mjg> even then is there a preferred way to do it?
<moon-child> gcc/clang just generate an stlr for a release-ordered store
<moon-child> so probably that's sufficient
<mjg> i'm geussing there is more than one way to post the barrier
<mjg> while doing the store
<moon-child> stlr is a store that has a barrier built in seemingly
<mjg> i guess i should check what gcc atomics compile into for that one
<mjg> should be good enough(tm)
<clever> my rough understanding of arm atomics, is that you only have load-exclusive, and store-exclusive
<clever> load-exclusive will fill an L1d cache-line with data, tag your core as owning the whole line, and load a sub-section into a register
<mjg> moon-child: ye stlr seems liek the way to go so far
<clever> store-exclusive will only store back to the L1d if your core still owns that cache-line
<moon-child> clever: there's cas also
<moon-child> I think for double-word atomics you _only_ get cas
<clever> moon-child: ah, i didnt think arm had something like cas, i assumed you make your own from load/store exclusive
<mjg> i thoguht the terminology is load link/store conditional
<mjg> or link load? never remember the order
<clever> yeah, thats another way to describe it
<clever> the docs say it tags a single 32/64bit slot as owned
<clever> but the implementation is free to be looser, and own the whole cache line
<mjg> anyway i'm looking at yet another example of code which throws away the value returned by cas
<mjg> and re-reads for retry
<moon-child> clever: https://lists.riscv.org/g/tech/message/394 may be an interesting read
<bslsk05> ​lists.riscv.org: Re: Requirements for 128-bit atomic operations
<clever> STM on haskell also operates in a manner similar to load/store exclusive on arm
<moon-child> ll/sc is basically a just a transaction on one cache line
<moon-child> (or word? idk, w/e)
<clever> basically, the first time your STM code reads an atomic variable, the engine will save the serial# and current value of that variable, and report the value to your code
<clever> and if you try to write to an atomic variable, it will just note the current serial# of that var, and store that as well
<clever> once you try to commit all changes, the engine will grab a global mutex, and check the serial# of every atomic var you touched in any way
<clever> if the serial#'s all match, then it commits the writes you requested, and increments the serial# for each atomic you modified
<clever> and releases the global lock
<mjg> wut?
<clever> if you lost the race (same as conditional store-exclusive on arm), then the write doesnt happen
<mjg> how global is it so to speak
<mjg> i mean what's the scope
<clever> and the engine re-tries the entire codeblock
<mjg> is this for any stm use?
<clever> moon-child: i think its for any stm usage, within the process
<mjg> well you make it sound as it does not perform for shit
<clever> the idea, is that all of the computation is done lockless
<clever> and only when you commit the data, does it check if it lost the race or not
<mjg> which given a fp language would not be particualaly surprising
<mjg> will have to look at haskell benchmarks at some point
<clever> the critical part, that really relies on a FP language, is that the engine can potentially re-run this atomic chunk of code many times
<clever> and there should not be any side-effects from running it a dozen times
<moon-child> https://groups.google.com/g/clojure/c/XHqWLMcsH-c cliff click critisises stm
<bslsk05> ​groups.google.com: STM criticism from Azul Systems
<clever> haskell solves that, by just not giving you IO, which is required for side-effects
<clever> STM then lets you build any complex atomic operation you want, like atomicly moving data from one fifo to another
<clever> moon-child: i have also seen STM backfire heavily, when lazyness also gets involved
<clever> but that also involved lazy blackholing, and hash tables
<clever> moon-child: have you heard about blackholing and lazy black holing?
<moon-child> nope
<clever> moon-child: basically, most functional languages break the code up into thunks, as a very crude example, (5*10)+30, might get broken up into a=5*10; b=a+30;
<clever> and each thunk, has a type (integer, thunk), and a value (5, or a function pointer)
<clever> and as the engine recursively turns thunks into concrete values, it will temporarily change the type to black-hole
<clever> and if it encounters another black hole, then it has ran into its own stack trace, and you essentially have an `a = a;` case
<clever> where you can never determine the value of an expression
<clever> but when threads get involved, you need to change the rules some, every thunk now needs: the type to be blackhole, and a mutex you can wait on, with a way to know if your thread already holds it
<clever> moon-child: so if one thread starts computing the value of `a`, and a second thread also needs `a`, it can wait for the mutex to be released, and then read the result
<clever> moon-child: the problem then, is that you dont want to grab a whole mutex, just to compute a simple 5*10, and write it back to a slot!
<clever> which is where lazy blackholing comes in, you just dont set the type as blackhole
<clever> and you write the result to the slot when your done computing
<clever> if a second thread was racing you, it overwrites the result of 5*10, with the result of 5*10, and no harm happens
<moon-child> hmm
<moon-child> what if you unsafeperformio?
<clever> i believe the compiler knows thats unsafe, and wont be lazy about that blackhole
<clever> so it gets a proper mutex, and only runs in one thread
<moon-child> I thought the whole point of unsafeperformio is that it's opaque wrt the type system
<moon-child> and--say, it's in another tu or whatever
<clever> i'm fuzzy on the exact implementation details, and there is an even more unsafe one, just wait till you see its name :P
<bslsk05> ​hackage.haskell.org <no title>
<clever> moon-child: look at the comments just above accursedUnutterablePerformIO!
<moon-child> haha
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<clever> the problem ive read about, is when you have an expensive lazy expression in a hashmap behind an STM atomic
<clever> each time you modify the atomic, you re-lazy the entire value
<clever> and if the lazy black-holing is in the wrong spot, every thread wastes cpu time re-computing parts (or all) of the value
<clever> and for a concrete example, `ghc -j10` has this exact problem
<clever> there is a list of all modules it has compiled so far, that is shared between all threads
<clever> so when you import another module, it can find the pre-parsed state and compile against it
<clever> but, each time a thread compiles a module, it changes that list, and then all threads re-compute the state in parallel
<clever> so the more threads you use, the slower each thread becomes
<clever> so -j2 is never twice the speed of -j1
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