<geist>
re: fpgas and networking, at least up through 1gpbs interfacting a fpga with a fairly cheap PHY is pretty easy
<geist>
they basically take the ethernet magic and convert into a fairly lowish speed parallel bus (ie, 8 bits at 125Mhz) that are pretty EZ to interface a fpga to
<mrvn>
The Arduino ethernet shield will have exactly that on it pre-programmed.
<geist>
and the standards (MII, RGMII, etc) are pretty straightforward
<geist>
at the end of the day the phy just blats out bits it has received on the wire and it's up to the MAC portion of the ethernet to pick out a frame
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<mrvn>
Main problem is it will never be fast. I have 16 address bits. I'm not going to be able to handle more than 1 frame at a time and processing will take forever.
<clever>
geist: a defcon talk was linked in here a few days ago, and they mentioned the insanity of gigabit rx, the tx unit transmits on all 4 pairs, and the rx unit will subtract what the tx unit is doing from the signal, to get the rx traffic
<clever>
geist: but as a result, a middle-man on the cat6 cable, is seeing the sum of both directions, and cant know what to subtract to make it useful
<mrvn>
clever: Think of it as a heliograph but the man-in-the-middle only has an omnidirectional detector.
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<clever>
there is also one other related thing, wake-on-lan
<clever>
i feel like WOL could be implemented in the phy
<clever>
you just configure a match string, like mac+magic, and then leave it in 100 or 10mbit mode when you shutdown
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<clever>
and it can raise a gpio if the match is found
<mrvn>
You need enough CPU logic to detect the begining of a frame, decode the MAC and the magic that makes it a WOL frame.
<clever>
the dest mac can be anything, from what ive seen
<clever>
and is typically the broadcast mac, because you cant answer an ARP
<clever>
from what ive read before, you typically put the mac+magic until a UDP frame, and throw it at 255.255.255.255
<mrvn>
Then all systems on the same switch would wake up at the same time.
<clever>
so the ARP layer sends it to ff:ff:ff:ff:ff:ff
<mrvn>
At work I use "wake-on-lan <mac>" to wake up servers as needed.
<clever>
thats why the mac is part of the string you chck for
<clever>
the mac isnt in the dest, its in the payload
<clever>
check with tcpdump, and youll see
<mrvn>
clever: likely. You have to check the MAC though.
<mrvn>
Isn't that exactly how WOL is implemented in NICs? They run the phy on standby power and when they see the MAC+magic they trigger the power line.
<clever>
yeah, but that mac_magic can be anywhere in the packet
<clever>
and you then use a udp frame sent to the broadcast addr, to convince the switches to send it to every phy in the building
<mrvn>
I never looked at more than how to use the tool. I would have assumed the WOL frame is a fixed size packet.
<clever>
its not even a magic, its just repeating the mac a crap-load
<clever>
so even if the phy misses half the bytes, it can still identify it
<clever>
with a stream of ffff's as a preamble
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<mrvn>
What's the first 48 bytes?
<mrvn>
is "Dst Port: 9" relevant for example?
<clever>
thats just the default in the WOL tool i used
<clever>
the first 48 bits is all ff's, the broadcast mac
<mrvn>
Sure. src mac, dst mac, src ip, dst ip, IPv4 frame, UDP. Some of the bits there must mean "Wake on LAN"
<mrvn>
Makes me wonder how many devices would wake up if you just send the data payload.
<clever>
$pkt = chr(0xFF) x 6 . $pkt x 16;
<mrvn>
Interesting to see that RPi64 has their own MAC range too
<clever>
reading the source, its just 6 x 0xff, and then 16 copies of the mac
<clever>
and the rest is just standard udp broadcast
<clever>
mrvn: i think the only reason it doesnt wake everything on the network, is because the trigger is hearing the target mac, so only that target reacts
<mrvn>
probably also works if you put in the actual MAC provided the switch either knows the port or broadcasts unknown MACs to all ports.
<clever>
yep, but can you send a packet to a mac, without root?
<clever>
the ip stack wants to ARP first, and will just no route to host when it doesnt answer
<clever>
so you cant use ip/udp
<mrvn>
good explanation
<clever>
you would need static arp tables on the sender
<mrvn>
definetly not. you want to send to a MAC directly.
<clever>
static arp tables would let you skip the arp query, so the ip maps to the mac, even when the host isnt answering arp
<clever>
but would be a pain to manage
<clever>
this also makes me wonder, if i left a `ping 1.2.3.4` running when i shutdown the machine
<clever>
the arp cache may still send to the mac, for a few packets
<clever>
and that may re-wake it?
<mrvn>
My Amiga doesn't repsond to ARP requests, some bug in the NIC driver iirc. So I always has a arp pong running on my server that would broadcast arp replies for the Amiga every 30s.
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<mrvn>
And Linux does arp snooping. If it sees an arp reply for anyone it remembers it in the table too.
<geist>
clever: yep! gigabit eth is pretty wild
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<mrvn>
And you can't build a token ring network with it anymore.
<clever>
geist: i would assume that running a phy in 10mbit mode would use far less power, so WOL would idle in that mode
<mrvn>
clever: your switch should show that
<clever>
yeah
<geist>
possibly though the 1gbit thing has a mechanism to stop the LFSR pretty quickly
<geist>
so it's not continually transmitting a pattern
<mrvn>
does it transmit anything when it's idle?
<clever>
ive only looked at the low-level encoding of 10mbit
<clever>
manchester encoding is involved, so the symbol rate is 20mhz
<geist>
not that i know of. basically what i remember was 1gbit one of the two ends decides to be the master and generates a known LSFR pattern on it continually, and there's a way for the receiver to decode deviations from it as data
<mrvn>
I guess it has to do something or it wouldn't detect when you pull the cable, right?
<geist>
but then the receiver can fiddle with the reflection off the pattern that the master end can interpret as data backwards
<geist>
but i think it also means the master end can stop sending the pattern after some period of inactivity
<geist>
and there's a way for the other end to signal that it wants to send something and the master end should start up again
<clever>
mrvn: oh, that reminds me, the negotiation on what speeds are supported, how is that encoded on the wire?
<mrvn>
clever: some test pattern and reply?
<geist>
iirc it's 4 pairs at 125Mhz with 5 signal levels a piece, going through some sort of LFSR
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<geist>
2 bits per clock per pair
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<mrvn>
geist: at least one pair has to have some power on it all the time or the NIC wouldn't be able to tell the cable was pulled.
<geist>
and with 5 levels there are at any state some transitions that are invalid, and thus can detect noise/etc
<clever>
geist: that sounds pretty similar to rgmii being 4bit ddr at 125mhz
<geist>
or it sends a heartbeat every so often, etc
<geist>
or it can put a tiny current on it and just look for continuity, etc
<geist>
but should be easy enough to look up
<clever>
but then, how do you convert 8bits into 5 signal levels?
<geist>
2 bits
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<mrvn>
sure, "all the time" == fast enough to trigger before the user sees it
<geist>
it's per pair, and there are 4 pairs
<clever>
ah right right
<clever>
so you could break the 4bit ddr 125mhz, into just 2 bits per lane, 125mhz
<clever>
and then shove that into the 4 twisted pairs, 2 bits per 125mhz
<geist>
yep
<clever>
and having 5 symbols on the wire, can give some ecc
<mrvn>
2 bit would be 4 levels + no data
<clever>
ecc could come from only certain patterns of symbols being valid
<clever>
so holding a given symbol isnt valid
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<clever>
and the change in symbols is the 2bit int, not the symbol itself
<bslsk05>
en.wikipedia.org: Trellis modulation - Wikipedia
<geist>
the key is for any given state only some of the state transitions are valid, so you always get some transitions (for self clocking) and you can detect bad signal or disconnected etc
<geist>
at the expense of not as effectively using the bandwidth
<clever>
yeah, similar to what manchester encoding did on 10mbit, and what usb1/2 does
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<geist>
not the same thing but also schemes like 8b10b and whatnot do time based modulation to get some of the same effects
<geist>
right
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<geist>
stuff like 8b10b (and the higher ones) are there to let you derive a clock from otherwise a long sequence of zeros
<geist>
by requiring that at least every so many bits you get a transition
<clever>
usb1/2 is just bit stuffing, where its illegal to have more then 4 symbols in a row, in the same state, so the transmitter will stuff an extra bit to break it up, and the receiver expects that and ignores it
<clever>
plus the symbols dont actually encode bits, but changes in bits
<geist>
right, there are higher bit versions of that. 128b132b iirc, etc
<geist>
more efficient, requires latching your PLL for longer, etc
<clever>
8b10b is different
<geist>
ah okay
<clever>
usb bit stuffing, is variable length
<clever>
some 4bit patterns, dont get stuffed, and transfer as-is
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<clever>
while other 4bit patterns turn into a 5 symbol stream
<bslsk05>
en.wikipedia.org: 64b/66b encoding - Wikipedia
<geist>
its more complex
<clever>
pci-e and hdmi are both using an nbit->ybit mapping
<clever>
hdmi is slightly more complicated, by having 2 sets of 10symbol words
<geist>
yep. it mentions that pcie 3 uses 128b130b and i vaguely remembered the newer ones use more of that
<clever>
the active period has an 8->10 encoding, while the blanking period has a 2->10 encoding
<clever>
and which 10symbol word you get, tells you if its active or blanking
<clever>
then further complicated, by the active period having specially chosen symbols, that have a low edge density, for EMI reasons
<clever>
while the blanking period symbols have a high edge density, to calibrate the receiver offset
<clever>
and blanking is only a small percentage of the signal, so its not going to be too noisy in the EMI
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<mrvn>
why do you always start such interesting discussions late at night. It's 3AM again already.
<clever>
oh, and i also learned something else fun about pcie a few days ago
<mrvn>
n8
<clever>
normal pcie has a spread-spectrum thing, for EMI reasons
<clever>
basically, the clock signal isnt a pure tone
<clever>
and the receiver can deal with that intentionally sloppy clock, because there is a dedicated clock lane
<clever>
but, if you disable spread spectrum, the receiver can recover the clock from the data alone, and with a pure tone for a clock, the receiver can just recreate it with a PLL
<clever>
geist: somebody on the rpi forums was asking how to configure the CM4 for doing that, and its just a flag in device-tree
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<geist>
oh that reminds me you were asking about the EL2 thing. yes that's a feature. v8.1 i believe
<geist>
it's uh, FEAT_... crap i forget off the top of my head
<clever>
ah, so the pi4 (cortex-a72 i think) wont have it?
<geist>
correct. basically it's to assist type 2 hypervisors to avoid as many EL switches
<geist>
basically you start in EL2 as yo would if you're going to build a VMM but then you set this bit and you more or less can run an unmodified EL1 kernel in EL2
<clever>
more by letting something like linux run in EL2, making it effectively a type-1?
<geist>
by aliasing a pile of EL2 registers to EL1 equivalents
<geist>
right
<clever>
and then linux doesnt have to perform hypercalls into an EL2 stub, every time it wants to do something kvm-ish
<geist>
you can still get to the EL2 registers directly, as you would when you're down in the part of the kernel that's doing the hypervisor bits (controlling HCR_EL2, VTTBR_EL2, etc) but otherwise you can just run normally
<geist>
correct
<clever>
its already in EL2, but the EL1 reg names refer to EL2
<geist>
right
<clever>
but how do you access the real EL1 regs?
<clever>
temporarily turn the alias off?
<geist>
that's a good question. i forget precisely how one accesses the banked ones, like when you're entering a guest
<geist>
normally if you have a strict EL1/EL2 separation then as you're loading guest context you can load up a bunch of EL1 regs prior to switching to them
<geist>
my guess is there's some new V* registers that actually bank EL1 stuff
<geist>
it's been a minute since i read it so i forgot
<clever>
in the case of LK, it would be less about performance, and more about not re-writting half of the kernel, to change the bank your using
<clever>
so you can run the existing codebase in EL2
<geist>
as a side note this is functionally what the riscv V extension does. you are running in supervisor mode but then you load up some 'v' versions of the same supervisor register and enter virtualized mode. and when in V mode your regular sup registers are really alises of the V ones
<geist>
but sine riscv has like 10 control registers it's pretty easy to just bank em
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<clever>
yeah, riscv is far more risc then arm is
<geist>
but it also does do the nested page table thing, which you basically have to do nowadays or no one will take you seriously
<clever>
i remember having multiple options in xen, on how to handle that
<geist>
yah the old days of shadow page tables and whatnot is nicely beyond us
<clever>
one of them was to just flag the guest pagetables as ro, trap every modify, and then update the real page tables on the host end
<clever>
did i ever mention colinux?
<clever>
its from the days before x86 virtual extensions
<clever>
it let you run linux on a 32bit x86 cpu, with minimal performance overhead
<clever>
nearly native performance
<clever>
with a windows "host"
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<mrvn>
Things to do to your fenemies: Peel of 2 stickers on a Rubiks Cube and swap them.
<mrvn>
frenemies
<mats1>
fremulon
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<friedy>
mrvn: my frenemies have sticker-less Rubiks cubes
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<mrvn>
friedy: they know you too well
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<sbalmos>
easier to just get some highlighter markers and recolor them
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<vdamewood>
friedy: I'm a frenemy of yours?
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<OSCritic>
So Sick of hearing about Serenity-OS. That OS Sucks. Is there better OS projects in this channel?
<psykose>
nope, only serenityos discussion happens here
<kof123>
serenity and temple, thats pretty much it
<OSCritic>
Very Disappointing. Serenity-OS is so very obviously written by someone who never studied real OSes. It doesn't even have a page cache and they call it a "modern OS"! It is modern for 1973, perhaps! I have no problem with hobbyism, but calling something so primitive a "Modern OS" is a sick joke and invites every criticism.
<psykose>
preach it bossman
<OSCritic>
It is very clear this is not the IRC server for me then. I prefer to discuss interesting and novel OSes. MINIX-3 is an order of magnification more impressive than Serenity OS, but I don't see Prof. Tanenbaum marketing it as a "Modern Desktop OS."
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<pounce>
hah
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<sonny>
Does anyone know about the 'kernel switcher' in MacOS?
<sonny>
I wonder what the technical name is ... it's hard for me to find information about it.
<j`ey>
what does it do?
<sonny>
It makes the kernel take up all memory instead of having a split physical memory layout
<sonny>
Then, it switches to the operating system.
<heat>
so
<heat>
how about that serenity os huh
<psykose>
got any ice, heat?
<sonny>
Eventually, this kernel block and the space get replaced by user mode programs https://ibb.co/V37zKNd