klange changed the topic of #osdev to: Operating System Development || Don't ask to ask---just ask! || For 3+ LoC, use a pastebin (for example https://gist.github.com/) || Stats + Old logs: http://osdev-logs.qzx.com New Logs: https://libera.irclog.whitequark.org/osdev || Visit https://wiki.osdev.org and https://forum.osdev.org || Books: https://wiki.osdev.org/Books
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<geist> sortie: also please implement ipv6. i have it too and i'd like to talk to something with
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<geist> actually ipv6 i've found to be pretty great for embedded, since it's easier to roll ephemeral addresses on local networks
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<heat> geist, you finally did v6?
<geist> no, but thinking about doing that next once i get stuff stabilized a bit
<geist> but i do have v6 network here at house
<geist> i have a whole VLAN dedicated to just v6 as well. nice playground for embedded LKs
<heat> i pseudo-have v6 in my OS, haven't implemented it for TCP
<zid> ipv6 not being absolutely mired in various layers of NAT just makes it nice in general
<heat> but my ISP does thankfully give me v6 which is nice
<heat> I used to have a wireless extender that didn't give me v6, just v4
<heat> that pissed me off
<geist> yah my isp also nicely gave me a /60 when i asked, so i have 16 nice subnets i can directly route
<geist> downside is stuff like setting up routing rules or fixed firewall punches i dunno how to do without fixed local ipv6 addresses
<geist> i have been just using non dhcp local address generation rules
<heat> get a router up :)
<geist> oh i do i just simply didn't want to use dhcp
<geist> dhcpv6. the local stuff works great
<heat> yeah it does
<heat> there's no need for dhcpv6 really
<heat> unless you're into booting through dhcp or whatever that thing was
<geist> but it's a bit harder in my router to say for example route <60 bit prefix>:0:1234:4321:4334:1443 to the same thing with a different prefix
<geist> vs say gets access to the 192.168.1.x subnet, etc
<geist> but that's fine, i'm mostly doing it with vlans now anyway
<geist> i'm actually happy with how much v6 is used here. the overall traffic through my router over the course of a month or so is usually at least 50/50 6/4
<geist> sometimes more like 60/40
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<zid> he.net gave me a /48, so if you need a billion /60s let me know ;)
<geist> i was happy xfinity did, i just had to tweak my dhcp on the router to ask for it, and sure enough
<geist> no NATs! each of the vlans get their own thing
<vin> In program order if you are performing a write from a buffer to a mmaped file and then reading from a different mmaped file to a different buffer, can these two overlap in reality due to out of order execution? Both read and writes are done using memcpy
<zid> they can happen in any order on the bus
<zid> the program will never see them out of order
<zid> (on platforms with a strong memory model, like x86)
<vin> isn't that bad zid? Because now reads and write interfere on the bus reducing device bandwidth
<zid> alpha and shit will need a barrier to ensure that
<zid> memory bus is faster than your devices
<vin> But the device bus (pcie) is being used because of reads and writes correct
<zid> and 'interference' is irrelevent here, you're doing random io
<moon-child> vin: if you are asking about the semantics of concurrent accesses, the answer is that generally, barring barriers such as fsync, guarantees are not made regarding ordering
<moon-child> (and there is no guarantee about commit of mmapped files anyway)
<heat> wait are you talking about file I/O or memory mapped io to a device?
<vin> moon-child: So would using fsync before I perform read ensure the read instructions to the device are not out of order
<heat> no
<moon-child> well, now I realise I need to know the answer to heat's question :P
<heat> you'd need an lfence?
<vin> heat: A file on the device is mmaped in map_shared
<moon-child> cuz 'memory mapped' means two very different things
<heat> generally mmap() regions don't write directly to a device
<vin> I have dissabled page cache
<heat> and if they did, I don't think the caching mechanisms allow it to do stuff out of order
<geist> you're still working with a buffer of memory, independent of when it's flushed to disk
<heat> yeah exactly
<geist> ignoring it's a file, if you simply have concurrent access to a piece of memory there are memory order guarantees (or lack of) depending on the architecture
<heat> unless you're on permanent memory, you're not mmap'ing the device directly
<heat> also what does "disabled page cache" mean?
<heat> you usually can't do that
<zid> what is a page cache
<heat> unless you use O_DIRECT but that only works on read(2)/write(2) I believe
<vin> that's correct
<bslsk05> ​en.wikipedia.org: Page cache - Wikipedia
<zid> oh the os thing I was thinking cpu things and was like wtf
<heat> mmap will always map the page cache
<geist> yah you can disable the page cache, but since memory isn't the file, there's always at least some delayed/external/etc mechanism that'll involve the kernel moving the data from pages of physical memory to the file
<geist> so you cant have perfect fidelity where each byte you write to the mmapeped file is synchronously written to the disk, etc
<heat> if you write using O_DIRECT and have it mapped on mmap(), you'll have different results
<geist> like you can pretend to have if you use read/write
<heat> erm, reads*
<geist> yah iirc disabled page caches and mmap() end up at odds with each other. ideally you could simply not mmap a file with the page cache disabled
<geist> but since they allow it you end up with a page-cache-disabling-defeating mechanism, so i thin klinux jumps through hoops to try to make it mostly disabled except where they cant
<moon-child> just trap on every write and flush it immediately :P
<heat> MAP_SHARED does trap on writes btw
<vin> A little more clarity, I am working with persistent memory, which allows me attach a storage device to the dimm slots. So it has ext4 fs in dax mode on it. Any data written to or read from this mount point will not be cached in DRAM
<geist> i remember having this discussion at work not terribly long ago with someone that was talking to Theodore Tso (who works at google) a
<geist> and i think the result is it's a best effort to act like the page cache is disabled, except it can't really truly disable it
<heat> vin: dax used to have a page cache I believe
<heat> now they cache and then if it gets evicted they don't re-cache? something weird like that
<vin> heat: no nothing gets cached, memcpy does mov or movnt instructions directly to device
<heat> but there's still caching
<heat> no.
<vin> I am 100% sure heat
<heat> i'm like a solid 80% sure pmem isn't direct
<vin> It is direct.
<heat> ok, i'll believe you
<heat> maybe i'm confusing it with something
<vin> My question is what barrier should I use to ensure a write is complete before I perform other tasks?
<zid> a write barrier
<heat> anyway, I don't think that matters since that's special memory
<zid> if the memory is even cached etc
<heat> just like you don't need write barriers when dealing with uncached
<zid> which device memory probably isn't
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<vin> zid: this is not a concurrent program, isn't barrier a synchronization primitive?
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<vin> So there is no fence for instructions?
<heat> lfence for loads, sfence for stores, mfence for both I believe
<heat> but unless that memory is cached, you don't need it
<zid> vin: It's an ordering problem, concurrency is one way to create ordering problems, the cpu re-scheduling instructions is another
<zid> There are special instructions for dealing with these issues, fences/barriers and bus lock prefices for example.
<vin> Why is that heat? When you say cache, do you mean page cache or l1,l2,l3 cache?
<heat> cpu cache
<zid> access control bits to the memory region
<zid> MTRRs on x86
<heat> the PAT
<zid> and PAT
<vin> heat: So cpu caches are used with pmem but not the OS cache, if that's what you meant earlier
<heat> I think that if the caching mode isn't "normal" that it doesn't know if reads and writes have side effects
<heat> vin, no I meant the OS cache, I remember reading about something funky going on with dax and the page cache
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<vin> zid: can you give an example of writes being fenced before reads are made, either fences or bus lock prefixes.
<vin> heat: no for sure they don't use page cache in fsdax mode
<heat> sfence
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<geist> that being said al this stuff you're talking about are at best arch specific
<geist> weaker memory model things like ARM it's a different kettle of fish
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<heat> it does look like pmem is cached
<bslsk05> ​lwn.net: DAX, mmap(), and a "go faster" flag [LWN.net]
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<heat> i'm thinking about ripping fuchsia's build stuff for my OS
<heat> I still don't know how i'm gonna put files in the image but I like the idea of using gn
<heat> i got some help on gn-dev but I still need to digest everything they said
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<kingoffrance> good news zid i can finally test your psx iso on real hw shortly :D just have to burn a disc and swap trick or action replay perhaps (no mod chip) i dont know what its supposed to do, but i expect next version will have a dragon
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<Jari--> Good morning noon from Finland EU
<Jari--> I integrated XML in my OSDEV kernel. It basically calls init sequence on XML tags. I am planning to put lots of money on my kernel development. Borrow as much as possible from Linux.
<kingoffrance> no luck with zid psx :/ i get a small square red haired anime style girl stroking her chin thinking...but guessing that is just the "splash screen" as i get that without doing any tricks. i will try again when i find my action replay
<kingoffrance> red as in red, not orange
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<sortie> geist: Yep definitely want IPv6 but it's most decidedly not going into 1.1 since I cannot allow myself to feature creep even more :)
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<kazinsal> as a certified network engineer, IPv6 is bizarre and almost 25 years after ratification still extremely esoteric
<sortie> Network like it's 1995
<klange> i just have too many things on my todo list and not enough time or willpower to do it
<sortie> I sort of can't wait to deep into IPv6 (except I can) to learn why AAAA records are four times the screaming
<kazinsal> avoiding breaking any NDAs, my team is about to kick off a network edge refresh for a customer with full BGP tables and all that lovely stuff and our discovery call included the exchange "what's your current IPv6 situation" "lmao there is none"
<klange> sortie: because IPv6 addresses are 128 bits and that's 4 times the size of an IPv4 address
<kazinsal> thus four times the screaming for DNS
<kazinsal> because DNS requires at least a bit of screaming
<raggi> v4's just a tonsil check AA, v6 is a scream AAAA
<sortie> klange, I mean you're explaining the joke, but I was referring to all the esoteric aspects that I wanted to learn, which warrants that screaming :)
<kazinsal> the esotery of IPv6 isn't even fully covered in Cisco technical certification manuals
<kazinsal> I don't think at this point that anyone is expecting IPv6 to take off
<raggi> address configuration has got you, just starting is wild
<sortie> Is it too large to just standardize IPv4 but with four times the address space?
<kazinsal> not only is it an enormous mental departure but it's also an enormous technical departure
<raggi> We're on trend for 50 deployment by 25
<kazinsal> the most efficient way to do software routing in IPv4 that everyone uses is a 256-way m-trie
<kazinsal> you simply cannot accomplish this in v6
<sortie> I wonder if my IP stack is good enough to host a real IRC server with persistent connections
<kazinsal> you *will* run out of memory.
<sortie> 128-bit address space when
<kazinsal> the most efficient hardware-assisted routing method is to use ternary content-addressable memory
<sortie> x128, come on intel
<raggi> Sad thing is the real reason v6 is gunna end up with a routing problem is vanity addresses
<kazinsal> and that's only going to get you so far
<kazinsal> the most efficient software routing method is that 256-way mtrie
<kazinsal> and an 8-depth 65536-way mtrie is not feasible for IPv6
<sortie> kazinsal, hey I learned about mavctap, it let me put one of my VMs on the actual internet :)
<kazinsal> neat
<kazinsal> bridged networking in linux has been a nightmare historically
<sortie> Yup
<sortie> I wanted to do it on my server, so I tried it out locally following the guide, and boom, took my local desktop offline
<kazinsal> my goal by summer is to write a new kernel core and bolt my stack onto it so I can start looking at a proper userspace and developing further network routing features
<sortie> mavctap is really what I wanted all along :)
<kazinsal> as is my kernel core is very broken and only 32-bit capable
<sortie> Really neat cuz my hosting provider issued me a MAC that gets the assigned IPv4 if it asks over DHCP, so I just used macvtap to set up a VM with that MAC, and boom, it's on the internet
<kazinsal> I don't see myself needing more than 4 gigs per address space right now but learning the ins and outs of x64 is a good idea
<sortie> https://paste.ahti.space/ba2a3d.html ← How I did it, really simple and cool :)
<bslsk05> ​paste.ahti.space <no title>
<kazinsal> as is I do kinda require PCIe support as I use MSI-X where possible for network adapters
<kazinsal> so at that point I might as well move to full x64
<kazinsal> I'd liiiiike to be able to have people basically deploy my OS up in a cloud VM or whatever as a virtual edge device
<kazinsal> it's probably not really feasible
<kazinsal> but it's fun to think about, in the same way that it's fun to think that my spending distressing amounts of money on guitars and amplifiers means that I'll one day play music for a living ;)
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<gog> mew?
<GeDaMo> gog: do you know of https://en.wikipedia.org/wiki/Lynn_Conway ?
<bslsk05> ​en.wikipedia.org: Lynn Conway - Wikipedia
* kazinsal pets gog
<gog> yes i've heard of her
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<j`ey> this looks so wrong (u64*)(*(u64*)page_to_free)
<gog> :|
<gog> i uh
<GeDaMo> It's a pointer to a pointer ... I think :|
<gog> yeh
<gog> but it's not stored that way initially
<j`ey> I definitely need to clean this up :P
<gog> nah it's fine :p
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<j`ey> my coworker could disagree :P
<gog> that can't be the same as *(u64 **)page_to_free ??
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<GeDaMo> I don't think so
<GeDaMo> Hmmm ... now I'm not sure :|
<gog> page_to_free points to a value that is later reinterpreted as a pointer
<gog> i think it's the same
<gog> but that seems too simple
<GeDaMo> I think you're right, it works because both the pointer and the value pointed to are the same type
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<gog> yeh seems to work
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<GeDaMo> I think your way might be more correct because the original version gets a u64 from the dereference then casts it to be a pointer
<GeDaMo> Your way says it's a pointer before the dereference
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<gog> the problem i have with it is whether the address value in *page_to_free is actually a pointer or if it's just being coerced into a pointer to satisfy the type of a function it's being passed to
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<gog> in which case i'd say refactor the function to take a void *
<GeDaMo> Ugh! :|
<gog> seems bad form to conjure a pointer to nothing :p
<gog> this is not a pointer, this is just a tribute
<gog> ceci n'est pas une pointeur
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<zid> There's always going to be a pinch point in allocator code
<zid> where it needs to be an integer a lot of the itme, but a pointer some of the time
<zid> it's just.. striking the right balance :p
<j`ey> it's a freelist type thing, so Im storing the address of the previous page at the start of the next page
<zid> yea I saw from the exp
<gog> ok so it actually is a pointer to a pointer
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<FatalNIX> I thought you said clojure not conjure
<FatalNIX> I was like... huh?
* gog draws a sigil on the floor and mutters over it
<FatalNIX> $40 for Yoshi's Island SNES cart.. justifying the worthness
<gog> do you want the cart or the game
<FatalNIX> ha
<gog> if the former, buy the cart
<gog> ¯\_(ツ)_/¯ if the latter
<FatalNIX> I have an SNES and we've been looking at getting some games
<FatalNIX> but we've also been looking at getting an SD cart
<zid> someone's been buying and flipping all the snes2ds etc
<FatalNIX> I am buying one as soon as I get paid
<FatalNIX> hoping they have one left
<FatalNIX> we've been wanting to get one for a few years but theyr're not cheap so we never justified it
<FatalNIX> what happened iirc is that everdrive stopped making them
<FatalNIX> just recently
<FatalNIX> I think their assembler shut down
<FatalNIX> Honestly I can't imagine making one myself
<FatalNIX> I could make one for gameboy if I sat down for a bit, but an snes flash cart? Looks a lot more complicated.
<zid> it's the same complexity is it not
<FatalNIX> Playstation is super easy, you can just buy a PIC chip or an ATTiny and download modchip source off github wire it in and bam you can write your own shit for it
<zid> a rom chip and an mmu
<FatalNIX> I think the SNES had a beeefier variant of the way the 10NES system worked
<zid> oh actually snes needs a CIC doesn't it
<zid> I'd use a donor cart anyway for the mmu so whatever I guess
<FatalNIX> and the NES being simpler.. the NES iirc had like some sort of fixed MMU mode or something...? I'm not sure how that works- something about fixed memory map typed or something. If the SNES did that too then it's just more shit to worry about.
<zid> NROM
<zid> aka no other banks
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<zid> mmuless carts for nes and gb are a thing, not sure about snes
<FatalNIX> given the way the bus is set up for the cart I mean there's nothing stopping you from having an MMU that banks ram already on the cart in realtime I guess
<FatalNIX> could just slap a CPLD in there
<zid> what do you mean stopping you
<FatalNIX> and program it with some memory magic
<zid> that's how they work
<FatalNIX> right
<zid> it's an address decoder with a couple of latches basically
<zid> so determine what the high bits of the address should be
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<Jari--> the CPU as RTM, what is it?
<bslsk05> ​tpm2-software.github.io: Protecting Secrets At Tpm Interface | tpm2-software community
<zid> released to manufacturing?
<bslsk05> ​en.wikipedia.org: Trusted Platform Module - Wikipedia
<Jari--> sequenceDiagram
<Jari--> Note over CPU(RTM): (NVIndex==MISSING || Attributes==MISSING)
<Jari--> Note over CPU(RTM): State = PROVISIONING
<puck> root of trust for measurement
<FatalNIX> meh. I kind of wonder if one could make a TPM module that was fake.
<FatalNIX> if it could be done transparently. I wonder how these actually work
<j`ey> root of trust measurement = rtm
<FatalNIX> For example, how does a TPM handle DRM?
<puck> the issue is basically everyone has a slightly different boot chain, so the values in the TPM can't reasonably be used to bind things against
<puck> e.g. update your BIOS, the PCRs in your TPM change, etc
<puck> i don't think anything actually uses TPMs for DRM even?
<bauen1> FatalNIX: yes you can make a "fake TPM", see swtpm
<FatalNIX> I'm just trying to think, how dumb is the OS that uses it, could you potentially make your own "dummy" TPM module and stick it on the TPM header of your motherboard and tell your board ok
<FatalNIX> Let's see what swtpm is
<puck> yeah, you could; LPC isn't too complex a protocol
<puck> but effectively you have to implement the entire TPM anyways
<bauen1> FatalNIX: you want to look at "evil maid" and bus sniffing attacks, there's a tpm2 bus sniffer on github
<puck> and at that point why not use a real one, or even just tell your bios "please use the fTPM"
<FatalNIX> haha
<puck> i mean, you're trusting your CPU vendor not to be malicious anyways
<bauen1> FatalNIX: there is however a manufacturer certificate in their tpms, so the tpm can "proof" it was made by someone, and you can use that to build a chain to base your DRM on
<FatalNIX> I just think that there's a chance the thing is going to make people mad eventually.
<puck> bauen1: the issue is, what's stopping you from taking a legit trace of a normal Windows boot, and playing it back into a legit TPM, and getting the necessary DRM keys out
<bauen1> FatalNIX: please always keep in mind that DRM is just one (perhaps very bad) application of it, you can also do things like e.g. have your laptop attest to your phone that it booted unmodified firmware
<bauen1> puck: absolutely nothing at the physical access layer, if you can only run code as root it becomes a bit more difficult as the BIOS code heavily affects what you can do
<puck> bauen1: i don't mean "to your own TPM", i mean to, say, a secondary TPM that's been pulled from another machine, or just bought online
<puck> i guess TPM2 has some kind of channel encryption, hrm
<Jari--> TPM2 specialists for hire.. hmm :)
<puck> but yeah, TPMs can't really protect against MITMs, which is why they turned out to be useless for DRM
<FatalNIX> It's also built into a lot of newer CPU packages
<puck> yes, though that doesn't really get you anything but a plain TPM anyways, and most BIOSes i've seen let you choose between fTPM and physical TPM
<FatalNIX> yeah
<puck> and nothing can prove it is running on the same CPU as that fTPM
<puck> (or well, not easily, i think? i don't know what the attestation certificates look like between e.g. SGX and the fTPM)
<bauen1> puck: yes you can encrypt (and more importantly authenticate) the communication with a discrete TPM, but that requires your CPU to have some way of keeping a secret, which kind of defeats the point in most cases
<bauen1> puck: yes, and the lack of MITM protection is annoying me quite a bit, otherwise they're quite cool :(
<FatalNIX> and if you had a custom TPM module you effectively have the endpoint of that encryption anyways I would think
<heat> Jari--, btw seriously, XML? yuck
<FatalNIX> I wonder if the DRM keys are unique per machine
<bauen1> puck: yes you can proof with an attestiation certificate that you're talking with a certain TPM (i.e. a discrete one manufactured by infineon or a fTPM with intel), i don't know exactly what you can attest (but firmware version is a part of it for sure)
<FatalNIX> it would be hilarious if the keys are universal
<bauen1> FatalNIX: read up on how attestiation is implemented for TPM2 (or FIDO i believe too), the DRM "corporate owner" trust the "tpm producers" certificate, and trusts them to make the tpm secure
<FatalNIX> somebody just dumps them and puts them on the Internet XD
<FatalNIX> so it's more like a form of Mtls at the hardware level
<heat> no one will ever dump the keys
<bauen1> FatalNIX: not necessarily, you can have the tpm that you're running certain software, and then give out "single use keys" or something like that
<heat> secure boot would be dead
<FatalNIX> secure boot is dead
<heat> what
<FatalNIX> I don't know anyone who even uses secure boot
<heat> hottest take of april 2022 huh
<bauen1> heat: it would be chaos if someone released microsofts secureboot ca keys ...
<bauen1> FatalNIX: that makes me the first one then ?
<heat> FatalNIX, 99% of the population
<bauen1> FatalNIX: also, most people using a recent version of windows most likely
<heat> everything has secure boot, and secure boot is enabled by default on windows systems
<heat> where recent = 20-fucking-thirteen
<heat> or is it 2012? probably 2012
<FatalNIX> Though I haven't tried installing windows 11.. Windows 10 you can just install without secure boot.
<FatalNIX> I have always disabled secure boot immediately
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<puck> all machines that came with windows 8 and up, basically all smartphones since forever, and all macs 2017 and up, i think
<heat> ^^this is literally everything
<heat> if secure boot is dead than everyone is dead
<bauen1> puck: to be fair, macs/iOS/android don't use "UEFI SecureBoot", but still some form of signed boot
<FatalNIX> Right but everyone I know myself has always disabled it as soon as they aquired a machine with it enabled.
<puck> you're likely not surrounded by "the average person" though :p
<heat> do you only know linux-heads? lol
<FatalNIX> You are correct
<FatalNIX> Well I mean
<FatalNIX> I'm more of a BSD head but
<heat> the only reason why I have secure boot disabled is that it's a pain to sign stuff on arch
<heat> but secure boot *is* a good idea
<bauen1> heat: and, even as a linux user who set it up itself, it's a bit of a pain to maintain the signatures (and for frequent updates also clashes with TPM attestiation in some way), still haven't found a very good way to manage it
<heat> I think red hat, canonical help out with secure boot so it works on their distros? something like that
<heat> but unfortunately I use arch btw
<bauen1> heat: there's the uefi shim / mok, pretty sure you could use that on arch too
<FatalNIX> OMG that term is banned on a Discord server I use XD
<FatalNIX> the I use arch btw thing
<heat> bauen1, yes and that's a pain
<heat> wish they just signed the damn thing
<FatalNIX> I am more of a freebsd and slackware linux user, I get fed up with systems like arch, but I mean at the end of the day it's all the same really.
<heat> at the end of the day freebsd is just a hipster arch
<FatalNIX> I don't -really- care what people use
<heat> and openbsd is a hipster freebsd
<FatalNIX> I am throwing that into #freebsd right now LOL
<gog> lmao
<bslsk05> ​lore.kernel.org: GCC 12 miscompilation of volatile asm (was: Re: [PATCH] arm64/io: Remind compiler that there is a memory side effect) - Mark Rutland
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<FatalNIX> Oh no...
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<FatalNIX> Glad I use clang, except that like anything it is just as susceptable to the same black magic and sorcery any other software has
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<j`ey> yeah, clang has its own bugs ;)
<FatalNIX> I love clang though, sometimes GCC doesnt' even report the actual error I might have and clang will be a bit more clear about it.
<FatalNIX> like for example, if I declare an array of the wrong size by mistake, gcc will throw something completely wild and seemingly unrelated
<FatalNIX> but clang will be like "look, it's literally this problem"
<gog> i said this before but i was sold on clang when it caught an overlapping comparison error i made and gcc never said a word about it
<mjg> was it up to date gcc though?
<gog> yes
<gog> well
<gog> no actually
<mjg> i can tell you that clang likes to FAIL to detect unitialized vars being used
<gog> 10.1
<mjg> while gcc has no problem
<FatalNIX> 11.2
<gog> i can't remember when i made that toolchain
<gog> 10 jul 2020 is the ctime on the file
<FatalNIX> Why are you making uninitialized variables?
<FatalNIX> :P
<mjg> i did not
<mjg> someone else did, i merged their branch and funzies started happening
<FatalNIX> My old professors in engineering were always driving it in our heads to initialize even if it's set to like 0 or something.
<mjg> no that's stupid
<FatalNIX> and to also never expect that the data in a variable is what you think it is either.
<mjg> then you prevent the compiler from telling you that you failed to account for the var
<FatalNIX> You are correct about that but most editors have the ability to tell you it is still unused
<FatalNIX> I know vscode does for me
<mjg> similarly you prevent kasan and other tooling from working
<mjg> s/working/doing their job/
<FatalNIX> Why are you not using all of your variables anyways. I will generally not declare anything unless I know for sure t hat either A something is going to use it (i.e. some necessary struct that is required to even work) or B) I am using it right now.
<FatalNIX> I try not to write ahead of myself
<FatalNIX> Maybe I am weird.
<j`ey> FatalNIX: it is being used.. but not always initialised
<FatalNIX> See I hate declaring things that I don't initialize. It's one reason I hate working in java at work, because Java almost punishes you for initializing your shit.
<gog> writing ahead of yourself is a good way to get a mess when it comes time to refactor
<gog> i do that a lot
<gog> and just end up wasting a lot of time
<gog> trying to control the habit
<FatalNIX> You want to initialize something in Java and it's like wtf I have to write 1000 characters in one line to initialize this shit (not actually true but damn)
<zid> ooh are we code reviewing
<bauen1> i'd love it if we could change C (and C++, but that's a lost cause) to default to const variables and require you to manually specify `mut`, would make most code easier to read imo
<FatalNIX> zid: just complaining now LOL
<zid> aww
<FatalNIX> Lol was that a Rust reference
<gog> review summary of my code: terrible
<zid> I am good at cleaning up C
<gog> i should be prohibited by law from programming
<FatalNIX> I really want to learn Rust and I have no reason why so I never did.
<zid> my url catcher didn't see anything
<zid> I am sad
<bauen1> FatalNIX: I'd suggest giving it a go, just so you know what the hype is about and what cool concepts rust has
<FatalNIX> tbf I do shit in languages that is terrifying sometimes. My friends look at me working on shit and go holy shit you're a genius and it's like, No. Do not write code like this. It's bad. It's definitely a no no. LOL"
<bauen1> gog: i did some horrible things in C++ using templates, yet someone actually took their time and reviewed my MR, and now I feel a bit sorry for them
<gog> :|
<gog> templates: not even once
<gog> (jk templates are good actually)
<FatalNIX> like when I wrote a 4b5b codec using nothing but C macros. Terrifyingly bad. Worked? Yes. Should I have done it? No. Reliable? If you use it perfectly. LOL
<j`ey> templates: multipe times
<j`ey> *multiple
<gog> true
<zid> templates? not even *400 pages of error*
<bauen1> gog: I'm not particularely good with C++, but the major problem I have with templates is actually that you can't "stop" using them once you start with them somewhere, they're sort of viral ; however they're a good C text macro replacement usually
<FatalNIX> bauen1: I've actually been pouring all of my love into Elixir for the past couple years. It's not a systems language like Rust can be, but holy shit is it amazing.
<gog> yeah they have a habit of making you go "i'll make THIS a template and THAT a template" when maybe it doesn't need to be :p
<FatalNIX> bauen1: kind of like $3000 facebook machine- er I mean macs. Once you pop you can't stop
<zid> I've needed a template while writing code precisely once
<FatalNIX> That's what I tell my mother because she's addicted to apple, I always say "Congratulations on your $3000 facebook machine mom"
<gog> the facebook machine is the worst architecture
<zid> I had some code that needed to deal with arrays of floats and arrays of uint32s
<mrvn> Just declarte the variable when you have a value to initialize it with.
<zid> I ended up type punning the float to int in a disgusting idb/ub manner
<zid> a template *may* have worked, after inspecting the output
<FatalNIX> Though.. if they can make an M1 dev board that is all open :P
<FatalNIX> Maybe an M1 based FPGA
<gog> they'll never do that
<gog> don't kid yourself
<FatalNIX> I'm not a huge fan of FPGAs though. I prefer CPLD when I can get away with it.
<FatalNIX> CPLDs are much lower power and simpler.
<bslsk05> ​web.archive.org: The Gray-1, a homebrew CPU exclusively composed of memory – Unusual projects
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<heat> templates are the shit
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<marshmallow> I'm wondering, does the kernel module responsible for handling the GPU features a built-in compiler in linux?
<j`ey> no, userspace has the compiler
<gog> dang
<zid> I send mine to a sweatshop to be compiled
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<heat> the in-kernel gpu driver just handles the display + executing of code on the GPU
<Ermine> + power management?
<heat> yeah
<heat> but most of the gpu drivers are in userspace under mesa/libdrm
<heat> the kernel part is just the low level "execute shaders, do modesetting, power management, firmware, memory allocation" stuff
<zid> or another way to look at it, userspace produces bytecode for the gpu to run via an ioctl
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<j`ey> what does this 0 do/mean? .comment 0 : { *(.comment) }
<j`ey> seems to be the 'start'
<heat> yeah
<heat> doesn't matter here since .comment isn't a loadable section
<zid> it's the lma
<gog> sets its VADDR to 0 and yeah it's not loadable so it doesn't generate any PHDRs for it
<heat> (i think it doesn't matter but I might be wrong)
<zid> vma? I forget
<gog> at least not in the default settings
<j`ey> from readelf, how do I know what's loadable or not?
<heat> sections or program headers?
<gog> section to segment mapping
<j`ey> sections, readelf -S
<heat> loadable sections have alloc set
<gog> yes
<zid> and you can look if it's.. actually.. loaded
<zid> by checking the [1] .text .rodata etc list
<j`ey> ok A = alloc in the output
<gog> yes
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<Griwes> So yesterday I asked about making the linker put each loadable segment at a page boundary... well turns out that lld actually has a -z flag for it, which I found after looking around its source code (after entirely missing it in the man page).
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<j`ey> max-page-size?
<geist> yep
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<gog> ah yeah
<gog> because ld will default to 2MiB pages for some reason
<gog> i also do -z separate-code
<clever> i believe you can also control all of that with linker scripts
<gog> because i'm a little obsessive about non-code things being in executable pages
<gog> different thinsg are different
<j`ey> code is data
<j`ey> data is code
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<gog> yes
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<gog> but no
<Griwes> No, I didn't mean max-page-size, I mean separate-loadable-segments
<j`ey> ah
<gog> von-nuemann architecture was a mistake
<Ermine> gog: are there any other architectures?
<gog> harvard
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<Ermine> Thanks, will read about this
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<moon-child> von neumann was an uptight bitch who thought that assemblers were a waste of the computer's time and we should just write machine code by hand
<moon-child> who'd want to use his architecture?
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<Bitweasil> Heh, I had to fight that some while ago, I wanted to write stuff in some hand written assembly that interleaved code and data. And the elf format just wasn't being agreeable, one of those Z type flags fixed it.
<Bitweasil> Also, <3 Harvard.
<Bitweasil> So many things in life would be better that way.
<Bitweasil> Can't execute your bleeping stack!
<moon-child> I would be happy with separate return and data stacks
<sortie> Please stand by for an important DNS record upgrade.
<moon-child> like, rop is a solvable problem ... and compiler vendors refuse to solve it ...
<Bitweasil> Intel's CET gets you a lot of that.
<Bitweasil> They've got the shadow "control flow" stack.
<Bitweasil> Which is *just* call/ret data, and IIRC is in "kernel" memory pages.
<Bitweasil> So not accessible to the program.
<Bitweasil> Plus the jump targets that limit your gadgets.
* Bitweasil scratches the DNS record back and forth and drops mad beatz with it.
<moon-child> you want it to be accessible to user code though
<moon-child> so you can do coroutines and exceptions cheaply
<moon-child> and I would rather have just one return stack, instead of duplicating information
<Bitweasil> *shrug* I've not looked at the docs on it too recently.
<Bitweasil> Been in the ARM weeds.
<mrvn> On x86 where the cpu writes the return address you could have the return stack read-only except for the CALL opcode.
<moon-child> but yeah shadow stack way better than nothing
<Bitweasil> They've made it work, somehow.
<mrvn> But on something like ARM where you have the return register that won't work.
<Bitweasil> Nope. But you have pointer sealing and stuff you can use there.
<clever> mrvn: there is also haskell, which doesnt use the call opcode even on x86
<Bitweasil> So that a corrupted return address load faults.
<moon-child> mrvn: you don't need it to be read-only. Just don't put it close to anything else
<clever> the haskell stack is a linked list on the heap, and every function is tail-call based
<mrvn> moon-child: then it will still be hacked
<moon-child> mrvn: current issue is, you overflow a buffer allocated on the data stack, and you corrupt the return stack
<clever> so calling involves creating a new stack frame on the heap, and jumping to a code chunk
<clever> and returning is just jumping back to another chunk
<moon-child> if the return stack is way far away from anything else (and at a random location), rop is _effectively_ dead
<mrvn> clever: which is a bit of a problem when you write your kernel in haskell. You have to make sure every IRQ and execption use their own stack.
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<clever> yeah
<mrvn> clever: interfacing with C is tricky too, have to switch stacks every time.
<clever> i have seen haskell in ring0 (under xen) but i didnt look at how irq handlers worked
<clever> and haskell does have some c glue logic, which still uses the native arch stack normally
<Bitweasil> clever, you don't happen to have messed with Xen on ARM, by chance?
<mrvn> maybe you can tell the compiler to leap SP alone and keep a stack there
<clever> Bitweasil: only used xen on x86
<Bitweasil> Ok.
<clever> mrvn: yeah, haskell has both userthreads and ow threads
<Bitweasil> I so want to get Xen running on the Rock5 when it shows up. :D
<Bitweasil> So I can work on porting Qubes.
<clever> os threads*
<clever> user threads are a linked list on the heap, and you can context switch cheaply
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<clever> os threads are more expensive, and get temporaily consumed when a blocking ffi call is done
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<sortie> irc.sortix.org now solves to which is routed directly to a Sortix IP stack on a cloud VM, port 6697 has TLS with a valid certificate, all running 100% on my OS! No proxying! No Linux cheating!
<gog> the professional sortix irc network :D
<sortie> :D
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<acidx> sortie: can you get (242 = 1010&255, 87 = 1111&255)
<acidx> (asking the important questions.)
<sortie> I do have .30 too
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<sortie> It's a /26 so I don't think I'll be assigned more than .64 but who knows
<sortie> acidx, come on over :)
<sortie> Let's interoperate some IP stacks
<acidx> the TCP stack I used to work on was replaced a while back. I'm not working on anything like that anymore. :)
<kazinsal> . o O ( IT nerd pick-up lines: hey baby wanna interoperate some IP stacks )
<sortie> RFC 2119 SAFE WORDS
<mrvn> When was "if (int i = 1) {...}" added?
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<mrvn> We discussed inline in C recently: Here is the crazy bit how C odes it: https://youtu.be/ieERUEhs910?t=2229
<bslsk05> ​'"New" Features in C - Dan Saks' by NDC Conferences (00:59:52)
<sortie> 2022-04-05 21:12:18.539195000 +0000: Disconnected from invalid user postgres port 22656
<sortie> Oh hey random internet background radiation connecting to my OS is submitting feature requests :)
<heat> hahahahahahahahaha
<kingoffrance> there used to be a museum of lost packets websit
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<moon-child> mrvn: you can do it with a macro
<moon-child> for (int i = 1, *_dummy = (void*)1; i && _dummy; _dummy = 0)
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<mrvn> moon-child: is that supposed to be "if (int i = 1) {...}"?
<moon-child> yes
<mrvn> How would that work if you have an else branch?
<mrvn> and why would I obfuscate my "if" that way in the first place?
<moon-child> 'obfuscate' hence macro
<moon-child> you wouldn't write that by hand
<mrvn> or I just write "if"
<moon-child> I'm not saying this is _ideal_
<mrvn> moon-child: The question was since when variable declaration in if conditions is part of the language.
<kingoffrance> that is declaration + initialization, but minor point. if (int i;) sounds like fun though :)
<kingoffrance> s/;//
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<mrvn> kingoffrance: plus scope. i disappears at the closing bracket of if
<kingoffrance> yeah, buckets of fun
<klange> languages are fun
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<kazinsal> dammit. it's all bright and sunny outside but I've got another hour of work :(
<kazinsal> I just want to go for a friggin walk
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<gog> i went outside for a walk in the bright and sunny. it was also cold and windy
<heat> iceland moment
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<gog> yeh
<kazinsal> I opened all the blinds and the sunlight immediately showed me how dirty my monitors were
<kazinsal> I am disgusted with myself
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<heat> why is it impossible for someone that watches all packets of a TLS connection to decrypt it?
<kingoffrance> one time pad is unbreakable. anything else i think "impossible" is not the question, it is "feasible timeframe"
<kingoffrance> decrypt when?
<moon-child> heat: asymmetric crypto
<heat> moon-child, does the client have a key as well?
<heat> this is probably the stupidest question but I honestly don't know, openssl just did it for me if that's the case
<moon-child> afaik yes
<clever> heat: i think part of your answer, is the DH key exchange
<heat> all I had to do was set up the ca-certs, and I understand why that's needed
<clever> using crypto voodoo, 2 parties can create a keypair each, exchange publics, and then agree upon a shared symetric key
<clever> and nobody that is passively sniffing can get that, since they lack the privates
<clever> but an active attacker can just play the role of both client and server, decrypt things, and re-encrypt things
<heat> ah wait it's created per connection?
<clever> yeah
<heat> that makes sense
<heat> yeah I get that
<clever> ssl has an extra layer, where you sign something using the keys in your ssl cert
<clever> and the client can then verify that the keys for this session, belong to whoever holds the keys in the cert
<clever> and then the cert itself, is signed by another cert, forming a cert chain, all the way to a trusted cert authority
<heat> doesn't tls also have that?
<clever> i believe tls is just the next version of ssl
<heat> yes
<kazinsal> SSL was Netscape's specification for encrypted+authenticated HTTP, TLS is the IETF standard that was developed from that
<heat> bbl
<moon-child> I think at some point they moved away from dh to another key exchange
<clever> moon-child: blizzard at one time used something called srp6a
<clever> which is a combination of dh, and password validation
<clever> the client has both a username and a password
<clever> the server has a username and the result of f(password)
<kazinsal> ECDH is what's recommended now
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<clever> they do a bunch of crypto voodoo, and a shared key pops out
<kazinsal> with x25519 or x448, preferably the latter as it's much stronger
<clever> if the server is fake, they dont have f(password), they get the wrong shared key, and have no evidence of what the users pw was
<clever> if the client has the wrong password, they get the wrong shared key, and the session fails
<moon-child> interesting
<kazinsal> it amuses me that we're still generally using diffie-hellman considering it's almost fifty years old now
<bslsk05> ​srp.stanford.edu: SRP: Design Specifications
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<moon-child> kazinsal: wait'll I tell you about natural numbers
<kazinsal> math is fun
<clever> moon-child: reading the specs closer, it derives a private key hashing a salt and a cleartext password, and creates a "password verifier" by computing g^x, then the host stores the username, the salt, and the verifier
<clever> so the private key is semi lost after the pw change is complete
<clever> but, a client that knows the salt, can recreate the private key, by hashing the salt and password
<clever> aha, and yep, the server will send the salt to the client
<clever> so the client can then re-create that private key
<clever> i'm guessing the verifier just acts like a public key
<kingoffrance> wait until i tell you about salt and sulphur and mercury </joke about oldness>
<kazinsal> I'm willing to NIH a lot of stuff but I refuse to roll my own crypto
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<clever> my recent interest in crypto, has been to investigate the rpi4 boot signing
<bslsk05> ​gist.github.com: bootcode.js · GitHub
<clever> this will parse a signed file, and extract the signature data at the footer
<clever> and also verify the hmac-sha1 signature
<clever> but i have yet to figure out how to verify the rsa signature
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<clever> moon-child: you happen to know anything?
<moon-child> nope sorry
<moon-child> I am not a crypto expert
<clever> my rough understanding, is that a signature, is just a short message (with well defined padding), that was encrypted with the private key
<clever> to verify, you just decrypt it with the public key
<clever> the message then contains the hashes of the signed object
<clever> but either i have the wrong public key, or i'm using the openssl tooling wrong
<clever> because the output message is just as random garbage as the input message is
<kingoffrance> i thought that was the purpose of salt
<kingoffrance> :) but do they salt those
<moon-child> 'signature, is just a short message (with well defined padding), that was encrypted with the private key' that's my understanding too
<kingoffrance> that is just to say...it could be something very stupid/simple...but one little thing off throws it all off
<clever> thats the problem i have with debugging crypto
<clever> the slightest mistake anywhere will result in an answer that is total garbage
<kingoffrance> what little i read about reverse engineering was: dont. find some info to give you a hint
<clever> and you have no hint about where you went wrong
<kingoffrance> yep lol
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<kingoffrance> not unlike johntheripper or whatever
<clever> as for hints, yeah, that helps massively