<Ivan0v>
now I see that "flash banks" actually returns the size I define in the .cfg... so it might not work as well :)
<PaulFertser>
Ivan0v: and now that I re-read your log I see "Error: EmbeddedICE v7 handling might be broken" which is not a good sign. Is it shown consistently?
<PaulFertser>
Ivan0v: why do you need to deal with such an old target?
<Ivan0v>
thats the only doc I have
<Ivan0v>
I want to dump the app running on the mc
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<PaulFertser>
Ivan0v: for an LPC type of board I would certainly expect some watchdog to be running, either internal or external.
<PaulFertser>
PLC
<Ivan0v>
I'm kind of suggesting there is a watchdog
<Ivan0v>
coz my first attempts were to dump it using the bootloader
<Ivan0v>
there is a custom bootloader on the chip
<Ivan0v>
with command dump... that actually dumps only printable characters (crap)... no idea what its usage might be implemented for
<PaulFertser>
Ivan0v: for the MCU you're not linking to the full documentation. It's just a datasheet and you need something like a "user manual" or "reference manual" where all the registers are explained.
<PaulFertser>
The MCU certainly has an internal watchdog
<Ivan0v>
then I found a command "go" and tried to write some shellcode on the variables section (i know how to do so by sniffing the IDE)... and managed to hang it for a second
<Haohmaru>
NXP? they only give you full datasheets and things after you register an account
<PaulFertser>
And regarding the external watchdog, you're supposed to identify all the chips on the board visually to tell if it's there or not I guess.
<Ivan0v>
by go 512000
<PaulFertser>
That's interesting, it might be a good extraction vector too.
<Ivan0v>
oh... this doc is the only thing I have
<Ivan0v>
yup, the thing is most of the time "go" command says "Invalid boot block"
<Ivan0v>
but if I write 48 nullbytes in the beggining of the section it bypasses this message
<Haohmaru>
how many pages is the document?
<PaulFertser>
Ivan0v: you certainly should get another doc.
<Ivan0v>
the lpc-2.mc8 doc is just 14 pages
<Ivan0v>
tried to contact smarteh but they look not to be keen to respond :)
<PaulFertser>
Ivan0v: and still not halted after that? What about "reset; halt" then?
<Ivan0v>
same result
<PaulFertser>
Ivan0v: and have you made sure there's no external watchdog?
<Ivan0v>
[lpc2388.cpu] not halted <--- when I try raed
<Ivan0v>
I haven't
<Ivan0v>
pretty much checked all the chips on the board and didnt find anything related to wd
<Ivan0v>
if im connected using jtag should be I communicating directly with the lpc2388, discarding any external wds?
<PaulFertser>
Ivan0v: if you checked all the chips then it means you have? :)
<PaulFertser>
Ivan0v: well, you're communicating with the target MCU sure, but it doesn't mean that nothing else is communicating too in parallel.
<Ivan0v>
well yes... nothing screamed watchdog at first sight :)
<PaulFertser>
Ivan0v: is the behavior you observe with OpenOCD the same if you try to halt when the target is in bootloader and when it's running main code?
<PaulFertser>
My idea with oscilloscope was to quickly check if the target can not be halted because of watchdog as in that case you could observe the target emitting a pulse on its reset line.
<Ivan0v>
ah cool... but I dont have one :/
<Ivan0v>
just double checked the chips on the board
<Ivan0v>
one rtc
<Ivan0v>
2 can trancievers
<Ivan0v>
rs tranciever
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<Ivan0v>
one static ram
<Ivan0v>
doesnt look like it has external watchdog
<PaulFertser>
Yeah ok. So now we have two theories: one is that OpenOCD just doesn't properly support this EmbeddedIce version, another is that watchdog is enabled very early by the firmware. Yet another is that somehow BusPirate interaction with the target is buggy.
<PaulFertser>
Ivan0v: have you checked if you could meaningfully access P2[10] to force it into ROM bootloader mode?
<Ivan0v>
the board has a switch that goes bootloader or app mode
<Ivan0v>
but tbh I dont know how to access P2[10]
<PaulFertser>
Trace the signals, probe etc.
<PaulFertser>
You can find that pin 76 and check continuity.
<PaulFertser>
I'm talking about ROM bootloader, not whatever the vendor flashed into it.
<Ivan0v>
the one connected with the pirate is working... and I kind of dont have physical access to the lpc2388
<PaulFertser>
Ivan0v: you do not need access while it's running.
<Ivan0v>
the one thats broken on 2 parts is what I used to examine the parts
<PaulFertser>
Also its not like you can not solder 7 wires to provide connection between the power supply and the target while getting the power supply out of the way.
<Ivan0v>
holy cow... this is way bigger than my skillz at that point :)
<PaulFertser>
Soldering wires?
<PaulFertser>
With 2.54 mm pitch
<Ivan0v>
the pins look super tiny and close to each other :)
<PaulFertser>
Either way, check where pin 76 goes to, probably there's an easy way to pull it down to force NXP bootloader mode.
<PaulFertser>
And then either the bootloader allows you to read everything or probably JTAG starts working.
<Ivan0v>
cool! I will check that now!
<PaulFertser>
Ivan0v: I can not really measure by the photo but it _looks_ like the distance between the power supply pins is 2.54 mm, is it not so?
<PaulFertser>
Ivan0v: probably we have some misunderstanding there; I'm commenting on "I kind of dont have physical access to the lpc2388", I assume you said that because there's a big additional power supply board on top, and my idea is that you could just put it on the table near and connect with the wires to both have power and access should you need that.
<Ivan0v>
they say flashmagic also can be used at this stage
<Ivan0v>
gonna try this tool though
<PaulFertser>
Ivan0v: flashmagic is only for windows though
<Ivan0v>
yup, gonna install vm if needed (hope not)
<Ivan0v>
but shouldnt be I expected to be able to just enter commands manually
<Ivan0v>
when bridging the uart
<PaulFertser>
Ivan0v: this code I linked to doesn't support those older MCUs officially but the protocol looks similar so probably can be easy to add support for your part too.
<Ivan0v>
i hope it will work out of the box :)
<PaulFertser>
It won't.
<PaulFertser>
Ivan0v: I haven't read into enough details of this ISP protocol description to tell if manual commands should be possible or not.
<Ivan0v>
yup it does not work :)
<PaulFertser>
What about JTAG in this state?
<Ivan0v>
havent tried yet
<Ivan0v>
i think the problem with the gibberish symbols was the baud rate
<Ivan0v>
I put it on 57600 and if I enter ? it returns Synchronized as expected
<Ivan0v>
the problem is I forgot how to make putty let me type a whole word and send it with Enter... right now its sending every key I type
<Ivan0v>
and I cannot return Synchronized as a command :)
<PaulFertser>
There's another gotcha with putty: it enables flow control by default.
<PaulFertser>
And yes, it's a terminal emulator, not so suitable for sending commands without pauses. Only if you paste into it probably.
<Ivan0v>
guess python comes handy in this situation
<PaulFertser>
Sure if you know enough of it.
<Ivan0v>
└─$ python3 commander.py
<Ivan0v>
Connected to: /dev/ttyUSB0
<Ivan0v>
> ?
<Ivan0v>
Synchronized
<Ivan0v>
> Synchronized
<Ivan0v>
and it stucks...
<Ivan0v>
blaaa :)
<PaulFertser>
Then you need to give it some clock frequency etc?
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<Ivan0v>
it says i should return Synchronized as well when I get it
<PaulFertser>
xon/xoff needs to be enabled too apparently
<Ivan0v>
ok new teory
<Ivan0v>
If i super quick enter ? and then Synchronized
<Ivan0v>
└─$ python3 commander.py
<Ivan0v>
Connected to: /dev/ttyUSB0
<Ivan0v>
> ?
<Ivan0v>
Synchronized
<Ivan0v>
> Synchronized
<Ivan0v>
Synchronized
<Ivan0v>
> Synchronized
<Ivan0v>
OK
<Ivan0v>
I get what I need
<PaulFertser>
That last OK is great.
<Ivan0v>
is it possible that the device reboots every few seconds
<PaulFertser>
Now you need to proceed with sending clock rate etc.
<Ivan0v>
yes but it stucks if I'm slow
<Ivan0v>
and I think that device reboots
<Ivan0v>
coz both power blinks like every 2 second
<PaulFertser>
Might be...
<Ivan0v>
+ pirate usb led also
<Ivan0v>
so why it reboots?!:)
<PaulFertser>
Weird, probably insufficient power?
<Ivan0v>
ummm how so? I just pulled down the reset... nothing else changed
<PaulFertser>
Ivan0v: have you tried sending the clock frequency sufficiently fast after OK?
<PaulFertser>
It might just reset waiting for that.
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<Ivan0v>
thats what Im doing
<Ivan0v>
Sending: ?
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: Synchronized
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: Synchronized
<Ivan0v>
Received: OK
<Ivan0v>
Sending: 10000
<Ivan0v>
Received: Synchronized
<Ivan0v>
Im doing something wrong :)))
<Ivan0v>
10000 should return OK also
<PaulFertser>
Yeah, should.
<Ivan0v>
but something is happening coz after I manage to:
<Ivan0v>
Sending: ?
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: Synchronized
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: Synchronized
<Ivan0v>
Received: OK
<Ivan0v>
Sending: 10000
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: 10000
<Ivan0v>
Received: OK
<Ivan0v>
just sent it 2 times as the "Synchronized" command
<Ivan0v>
and now the device wont sync anymore
<Ivan0v>
it changes state... but no ISP commands are applicable :)
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<Ivan0v>
little progress... if its a word it echoes it back...
<Haohmaru>
Sir-Paste-A-Lot
<Ivan0v>
└─$ python3 quicker.py
<Ivan0v>
Sending: ?
<Ivan0v>
Received: Synchronized
<Ivan0v>
Sending: Synchronized
<Ivan0v>
Echo: Synchronized
<Ivan0v>
Received: OK
<Ivan0v>
Sending: 10000
<Ivan0v>
Echo: 10000
<Ivan0v>
Received: OK
<Ivan0v>
Yes, sorry about the spam :/
<PaulFertser>
Looks like you're gettng there.
<Ivan0v>
yup.. starting to get exciting ;)
<Ivan0v>
but i need 15min rest... my head is gonna explode :)
<Ivan0v>
gonna spam later again :)
<PaulFertser>
Ivan0v: please use some pastebin instead
<Ivan0v>
I will. Sorry again!
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<circuit-breaker>
Can I get some help on how to add an external SPI NOR flash loader? I have a NOR flash device connected to the SPI interface of the processor and I would like to use openOCD to write a program in ram that loads the firmware binary to the external NOR using the SPI peripheral of the processor. I thought the nuvoton example was a good starting point
<Ivan0v>
PaulFertser: device keeps rebootin every 2sec...
<PaulFertser>
Ivan0v: sounds like a watchdog...
<PaulFertser>
But it shouldn't be running in that bootloader?
<Ivan0v>
watchdog in the in-chip bootloader?
<Ivan0v>
should not be the case..
<PaulFertser>
2 seconds isn't that short, probably you can managed to dump few bytes if you automate the process?
<Ivan0v>
yea thats what I was thinking :)))
<Ivan0v>
but first Im gonna check if its rebooting after I brake it trough JTAG?
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<circuit-breaker>
Is this the correct place to ask development related questions?
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<PaulFertser>
circuit-breaker: sure
<PaulFertser>
circuit-breaker: it's just that I do not know what to answer you yet.
<PaulFertser>
circuit-breaker: do you have the same zbit target MCU?
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<circuit-breaker>
PaulFerster: No, I am using an old ARM926EJ-S device: LPC3131
<PaulFertser>
circuit-breaker: basically, flash drivers in OpenOCD work like you describe: a helper is uploaded to SRAM and then it runs reading data from a circular buffer while OpenOCD pushes new data in that buffer in lock-free fashion.
<PaulFertser>
circuit-breaker: you can see how stmqspi does it.
<PaulFertser>
circuit-breaker: do you have any specific hesitations?
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<circuit-breaker>
PaulFertser , its confusing to me on where I need to modify the code. There seems to be some work needed in src/flash/nor/ for my specific device and also in contrib/loaders/flash/ folder.
<circuit-breaker>
Using the stmqspi as an example, I see the stmqspi.c an .h but how does that relate to the assembly in contrib/loaders/flash/stm32 ? For example in stm32flx.S, there is a program with multiple labels ( wait_fifo, busy, no_wrap, etc.)
<circuit-breaker>
How does that assembly make it to the CPU ?
<PaulFertser>
circuit-breaker: the assembly is compiled into binary and then included in the openocd source code.
<circuit-breaker>
PaulFertser: thanks for that. I think I understand that part. I need to write the flashloader and compile the c or assembly and convert the binary into text characters openOCD can read.
<circuit-breaker>
I am still confused about the API after I write the flashloader. In src/flash/nor I see use of a flash driver struct and how I need to implement all those functions. How does that interact with the flashloader?
<circuit-breaker>
PaulFertser: Once I create and register my custom flash driver, how does it interact with the precompiled assembly for my target? That part is a little fuzzy for me.
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<circuit-breaker>
PaulFertser: I think I see it now. In stmqspi.c, line 1366, the qspi_read_write_block function. That is where the binary is transferred to the target. Thanks again for the help.
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<Ivan0v>
PaulFertser: so JTAG is totally useless... every 2 seconds it generates errors coz the lpc keep rebooting... anyways I'm successfuly able to dump up to 600 bytes per turn with uart0 :)
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<Ivan0v>
Super duper thank you man!
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<PaulFertser>
Ivan0v: but you can also dump something with JTAG, you can automate OpenOCD to reconnect and dump the next part etc.
<PaulFertser>
Ivan0v: but if you're getting good data with bootloader, that's great too.
<PaulFertser>
Should work. You have the whole night ahead for dumping :)
<Ivan0v>
It does not want to communicate with JTAG at all
<Ivan0v>
triple checked it... not sure whats wrong but it drops alot of errors
<PaulFertser>
Might be incompatible embeddedice version :/
<Ivan0v>
yup, thats one of the errors :)
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