NishanthMenon changed the topic of #openocd to: this is the place to discuss all things OpenOCD | Logs: https://libera.irclog.whitequark.org/openocd/
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<zapb__> borneoa___, is there now an official FOSS division at ST? (saw your foss email address)
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<quinq> Hello
<PaulFertser> Hi
<Guest57> Hello, does anyone have any ideas or thoughts on my question from yesterday?
<quinq> I'm trying to get OpenOCD working with a BusPirate connected to an IPQ8064 in JTAG
<quinq> First time with OpenOCD by the way
<quinq> I'm not sure how to get which pins OpenOCD is using on the BusPirate
<quinq> I looked at src/jtag/drivers/buspirate.c, but I can't find that info, maybe I missed it?
<quinq> Is there some documentation you would recommend?
<PaulFertser> quinq: yes, hold on
<PaulFertser> Guest57: there is a memory map, you can see it with "set debug remote 1" in gdb, it's passed in XML to tell about GDB regions etc.
<PaulFertser> Guest57: but usually everything but flash is assumed to be writable to make it easy to talk to MMIO peripherals.
<PaulFertser> quinq: make sure voltage is compatible, is that IPQ8064 using 3.3 V, not 1.8 v?
<quinq> It's 1.8V
<quinq> Thanks Paul, but actually I'm looking for how to connect SRST and TRST
<PaulFertser> quinq: TRST just pull up, do not connect anywhere.
<quinq> I had this: http://dangerousprototypes.com/docs/images/b/be/Bp-cable-color-hk.png which shows TDI/TDO/TCK/TMS
<PaulFertser> SRST to AUX
<PaulFertser> quinq: but BP doesn't support 1.8 V, so what are you going to do about it?
<quinq> ok
<quinq> Hummmm
<quinq> Is it not able to output whatever V with a vREF input?
<quinq> I connected the VPU to vREF
<quinq> ok, let-me rewind and give more context maybe :D
<quinq> There's a 20-pin JTAG (you helped me with that last time IIRC)
<PaulFertser> quinq: I think BP doesn't have a voltage follower. Not sure, please read the docs before trying!
<PaulFertser> quinq: my current understanding is that one must avoid connecting BP to a 1.8 V target.
<quinq> oh :/
<quinq> May I dare the question then
<quinq> Would you recommend an alternative?
<PaulFertser> If you're not doing commercial development "jlink edu" or even jlink clone from aliexpress make sense. Olimex ARM OCD JTAG H is a decent device hardware wise. There's also TUMPA (non-light!) which is a bit quirky in certain aspects but probably the cheapest FTDI2232-based adapter with proper high-speed voltage translator.
<quinq> Yeah, it's just for my own smol usage
<quinq> Thanks :)
<PaulFertser> Bare FTDI isn't going to do what you want.
<PaulFertser> With TUMPA I even managed to access a 1.8 V UART but that was silly: sending output on interface A via the proper JTAG buffer powered from the target and receiving on interface B without voltage translation.
<quinq> hah
<PaulFertser> (full disclosure: my TUMPA was for free in exchange of adding proper config to OpenOCD, and v2 in exchange for providing some feedback about schematics)
<PaulFertser> I still do not like they didn't made SRST open-drain.
<PaulFertser> And adding proper support for 1.8 UART would make sense too (but I probably didn't suggest it back then).
<quinq> Providing hardware for getting software support sounds like the minimal :)
<quinq> I can't seem to find an EDU on Segger website https://shop.segger.com/debug-trace-probes/debug-probes/j-link/
<quinq> And 400€ is… A lot ^^
<quinq> I need to top up my German
<PaulFertser> quinq: I'd prefer TUMPA to j-link unless you need some other software that only talks to jlink.
<quinq> Whatever works :D
<karlp> you can buy an orbtrace for less than 400€
<NishanthMenon> (disclaimer: i bought TUMPAs) - big fan.. works out of box + has interfaces for other stuff you'd usually need ..
<quinq> If you find where to buy them from :D
<NishanthMenon> quinq: at least for the boards I help with, I tried to put the links https://docs.u-boot.org/en/latest/board/ti/am62x_beagleplay.html?highlight=tumpa#debugging-u-boot
<NishanthMenon> and apparently the site says "in stock"
<quinq> Perfect
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<Guest57> Is there any way to define a memory map within OpenOCD? For instance if a part has external memory. I have run into an issue where accessing an invalid region is causing a problem so wondered if there was a way to specify a memory map and stop users from accessing anything outside of those regions defined.
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<borneoa___> zapb__: no, it's just a separate mail server, mainly for foss upstream, due to legal but mainly due to technical reasons. The usual server adds automatically too many extensions (signature, crap in the header, ...) that corrupt the text-only patches. So, we added a dedicated server for whoever in ST needs it for the upstream.
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