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<Guest9>
I finally found the culprit ... the power supply board had a small glitch during bootup ... which interrupted the FPGA during the first few milliseconds during configuration .... thank you guys, especially PaulFertser, for the help
<PaulFertser>
Guest9: thank you for sharing! Do you think you know why it was different with vivado?
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<Guest9>
it was not. but i did the initial test with vivado, then one of our engineers wanted to test a new revision of the power board and i told him to use my device. '
<Guest9>
to voltage rails stabilize really quick, so without a scope, you won't even see the glitch
<Guest9>
and as I am just to green regarding FPGAs I was uncertain about the different places the issue could be and was looking for the issue in the wrong place.
<PaulFertser>
Guest9: I see. I tend to re-check known good configurations when issues arise (on both hardware and software levels) exactly to have a reliable reference point.
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