10:38 <josuah> I just discovered gerrit, a bit frown upon from Github users at times, but I really like it!

10:38 <josuah> thanks for introducing me to it (implicitly, by using it yourself)

10:54 <Haohmaru> gerrit sounds like git with an "err" in the middle

11:14 <PaulFertser> josuah: welcome :)

11:45 <josuah> Haohmaru: the "err" of all the discussions and brainstorming before things get merged in

12:54 <Guest9> hello there, I might be using slightly the wrong software, but i am hoping you can point me in the right direction. I am programming an FPGA with a raspberry pi. Currently using openFPGALoader. I can flash the devices volatile and non volatile memory successfully. But when I disconnect power to the FPGA, it won't automatically reconfigure itself

12:54 <Guest9> from the SPI flash. I first have to issue a reset command over JTAG. When I write the SPI flash from Vivado and power cycle the FPGA, it works just fine. I am uncertain where this information is stored. Why does the FPGA not boot from the SPI flash when i use openFPGALoader

12:54 <Guest9> I want to try openocd and its currently compiling on my pi

12:59 <PaulFertser> Guest9: you should be able to make Vivado write you an SVF file, it would contain all the JTAG operations, and then OpenOCD can play it back.

13:10 <Guest9> https://gist.github.com/tnishinaga/46a3380e1f47f5e892bbb74e55b3cf3e is this the config for the rpi4 as a master?

13:11 <karlp> we don't know from the information provided.

13:12 <karlp> I would suspect that you will have the same issue with openocd as with openfpga loader, I suspect you might be missing something in your flash dump?

13:12 <karlp> or vivavdo is doing something else as well.

13:12 <Guest9> thats what i am wondering. but it wworks with the spi flash and the manual reset

13:13 <Guest9> so maybe there is a "tail" at the end of the bitstream that issues the reset to the fpga or s.th. its really weird

13:13 <Guest9> and i am just a software programmer:D  i am hitting my head against this wall for two days straight now

13:22 <PaulFertser> Guest9: SVF output should capture everything, bitstream and reset included.

15:56 <Guest9> PaulFertser, so is there such a thing as a _tail_ in the fpga bitstream stored on the spi flash that does the reset after configuration?

16:00 <PaulFertser> Guest9: no, I do not think so.

16:10 <Guest9> ok, i found the config files, i set up the correct gpio pins ... how would i go about just enumerating all devices connected to the jtag bus?

16:12 <PaulFertser> Guest9: just source the adapter config, then -c "transport select jtag; adapter speed 1000"

16:15 <Guest9> well. ok, i think my issue is that i wired the raspberry pi wrong. is there a way to bitbang it?

16:39 <Guest9> so ...

16:39 <Guest9> Info : BCM2835 GPIO JTAG/SWD bitbang driver

16:39 <Guest9> Info : clock speed 997 kHz

16:39 <Guest9> Info : JTAG tap: auto0.tap tap/device found: 0x13636093 (mfg: 0x049 (Xilinx), part: 0x3636, ver: 0x1)

16:39 <Guest9> Error: IR capture error at bit 2, saw 0x05 not 0x...3

16:39 <Guest9> Warn : Bypassing JTAG setup events due to errors

16:39 <Guest9> what do the errors mean

16:39 <Guest9> ?

16:41 <PaulFertser> Guest9: probably that the target isn't exactly matching the specs and so auto-detection doesn't fully work, but you shouldn't be bothered about it.

16:54 <Guest9> i can connect over telnet, unfortunately it seems to be only bound locally

16:54 <Guest9> > scan_chain

16:54 <Guest9>    TapName Enabled IdCode Expected IrLen IrCap IrMask

16:54 <Guest9> -- ------------------- -------- ---------- ---------- ----- ----- ------

16:54 <Guest9>  0 auto0.tap Y 0x13636093 0x00000000 2 0x01 0x03

16:54 <Guest9> >

16:54 <Guest9> sio its an artix7 and i want to program the flash thats "behind" it

16:55 <Guest9> but it seems that openocd is significantly faster than openFPGALoader and xc3prog

17:11 <PaulFertser> Guest9: don't bother with autodetection, you proved already that the target is connected nicely.

17:13 <Guest9> thanks

17:14 <Guest9> after changing it a bit though, when i perform scan_chain over telnet i get a rather long list

17:14 <Guest9> and less errors

17:14 <Guest9> and i now added the xc7 cpld and fpga target, which makes sense looking at the architecture

17:14 <Guest9> -- ------------------- -------- ---------- ---------- ----- ----- ------

17:14 <Guest9>  0 xc7.tap Y 0x13636093 0x*3622093 6 0x01 0x03

17:14 <Guest9>                                            0x*3620093

17:14 <Guest9>                                            0x*37c4093

17:14 <Guest9>                                            0x*362f093

17:16 <PaulFertser> Guest9: please do not paste more than 3 lines in a channel, use some pastebin.

17:16 <PaulFertser> Guest9: yes, appropriate IR len helps of course.

17:20 <Guest9> thanks!