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<Guest42>
Is there support for cjtag?
<PaulFertser>
Guest42: hi. Only to switch away from it.
<Guest42>
There benefit with cjtag? Less pin count
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<Haohmaru>
crap, i've chosen to use this "DWT" thing from the cortex m4f for the purpose of small blocking delays... and it seems cortex m0+ doesn't have it
<karlp>
correct.
<karlp>
why would you have done such a thing...
<karlp>
using m0 is for suckers.
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* Haohmaru
slaps karlp with the global chip shortage
<karlp>
no excuse for using m0
<Haohmaru>
i'm making a "remix" of a device which uses an xmega, which i can get somewhere in the summer of 2023
<Haohmaru>
in the meantime we bought a small pile of cortex M0+ chips
<Haohmaru>
so the remix uses those
<Haohmaru>
if that's not ugly enough, the new board has a combo QFN-32 and TQFP-32 for that MCU, whichever of the two we find
<karlp>
I mean, I think using the cycle counter for non-perf related counting is a bad idea in general, even on top of using M0s :)
<Haohmaru>
i used that counter thing to make some busy_wait() helper function, i use it in the SPI-master code
<Haohmaru>
actually, i use it in external SPI device "drivers", say, SPI eeprom
<Haohmaru>
i remember that i was wondering how to do it, was thinking of either using a timer from the MCU, or the systicks, or this DWT thing, i've went for DWT
<Haohmaru>
in general i'm not too happy with my SPI code
<Haohmaru>
karlp what's the problem with M0(+)?
<karlp>
no dwt :)
<karlp>
you get ~zero trace and advanced debug.
<Haohmaru>
i don't know if i'm even using "trace" on the M4F
<Haohmaru>
which probably means.. i'm not
<karlp>
well you're certainly not going to be using it on m0.
<Haohmaru>
i'm n00b when it comes to debugging
<Haohmaru>
i have no idea what i'm doing
<Haohmaru>
what does the trace thing give you?
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