08:35 <borneoa_> PaulFertser: hello Paul, I think it's already the 4th time since last Gerrit update that a new patch doesn't trigger the Jenkins build, so no +1 in Gerrit. Today it's on review.openocd.org/7236/

08:36 <borneoa_> PaulFertser: do I have any way to manually trigger a build, apart from disturbing you or asking the author to rebate or modify and resubmit the patch?

08:47 <PaulFertser> borneoa_: I should just add you to Jenkins permissions list then. Will do shortly.

08:49 <borneoa_> PaulFertser: thanks! Then I need to learn how to trigger the rebuild...

08:49 <PaulFertser> borneoa_: yes, it's easy, I'll tell you.

09:00 <PaulFertser> borneoa_: I've triggered manually, atm reading about jenkins users/roles etc, will ping you when I'm ready.

09:07 <borneoa_> PaulFertser: ok, no problem

09:07 <PaulFertser> borneoa_: what username and e-mail would you like for the Jenkins account?

09:08 <PaulFertser> Let's switch to /query

10:11 <borneoa_> PaulFertser: borneoa and borneo.antonio@gmail.com

10:45 <PaulFertser> borneoa_: when you log in, there's a "Query and Trigger Gerrit patches" on the left, there in the query string you just type patch number (e.g. 7236) and then tick it and trigger.

13:47 <borneoa_> PaulFertser: sorry, new issue on Jenkins. Change 4760 (old but just rebased). The script spdxcheck.py is missing the package python-ply or python3-ply, depending on the host's version

13:49 <borneoa_> PaulFertser: actually it is one of the first package included, so there could be other package missing... to be checked

13:55 <PaulFertser> borneoa_: looking into it.

15:39 <PaulFertser> borneoa_: I've installed the needed modules and retriggered. Checkpatch will report an interesting warning about macro.

15:39 <PaulFertser> borneoa_: btw, there's also "Retrigger" button on the left when you're viewing a particular change.

16:16 <diddly> anyone used an stlink v3set with openocd? it looks like despite the name, it presents as an stlink-2.1?

16:44 <borneoa_> PaulFertser: yes, about side effects in a macro. Btw the dependencies of checkpatch should be listed somewhere, maybe on hacking file

16:46 <borneoa_> diddly: very strange. The stlink v3 reports the API version. Can you use some pastebin to send us the initial log of OpenOCD?

16:46 <PaulFertser> borneoa_: agreed

17:20 <diddly> borneoa_: no, i don't have hardware, just trying to decide if it is worth buying one since the v2's are all out of stock and I have a new dev starting in a week who will need a programmer

17:54 <PaulFertser> diddly: real stlinkv3 is fully incompatible with non-ST targets.

17:54 <PaulFertser> diddly: where did you get information you refer to ("it looks like...")?

20:17 <diddly> PaulFertser: now I can't find the page that led me to believe that. ok to ask another way, does mainline openocd support stlinkv3? I'm ok with stm32 only

20:18 <diddly> My distro currently only has 0.11 and I didn't see a config for v3 in that package

20:18 <PaulFertser> diddly: upstream openocd supports stlinkv3, yes.

20:19 <PaulFertser> diddly: self-compiling should be straightforward. And there's 0.12.0-rc1 in Debian testing already.

20:20 <diddly> I use gentoo, but they are pretty good about adding it quickly. I can run rc1 locally until then

20:20 <diddly> who knows, it might already be in an overlay

20:20 <PaulFertser> diddly: you have -9999 in Gentoo

20:20 <PaulFertser> Doesn't it work?

20:21 <diddly> -9999 is usually master, so I tend to avoid, but probably easier than spit-rolling my own in this case

20:21 <diddly> I'll give it a whirl, thanks!

20:21 <borneoa_> diddly: the stlink driver in OpenOCD automatically detects the version, no need to specify a different configuration

20:22 <diddly> borneoa_: yeah, I'm and old dog :)

20:22 <diddly> I should update all my configs

20:23 <diddly> oh, it looks like even 0.11 supported stlink v3 now that I look in the stlink.cfg

20:23 <diddly> My flawed asusmption of there not being a stlink-v3

20:23 <diddly> duhh

20:24 <diddly> Sorry to waste everyones time :)

20:24 <borneoa_> diddly: better if you use updated config files, but we try hard to not brake user's config. When one command changes syntax, we add some script to handle the old syntax plus print some deprecated message to help the user to update.

20:25 <borneoa_> diddly: s/brake/break/

20:26 <diddly> yup, it's a pretty tight project. i've been using for years without ever thinking about it :)

20:27 <PaulFertser> Yes, 0.11.0 has support for stlink-v3 but probably not all variants of it. Better stick to 0.12.0 or master.

20:28 <PaulFertser> You might also prefer a CMSIS-DAP adapter as it has no limitations of stlinks.

20:30 <diddly> do you know of one that's inexpesnive and not just a raw board? I have ftdi breakouts, but this has to be on someones desk who isn't too, ahem, careful :)

20:30 <diddly> We are primarily an stm32 shop, and the stlinks are cheap and (used to be) easy to find

20:32 <PaulFertser> Not sure then, probably stlink v3 is a good option in this case. With first-class support from borneoa_ :)

20:34 <diddly> haha ok

20:34 <diddly> thanks gents

20:36 <PaulFertser> diddly: btw, a warning wrt ftdi breakouts

20:37 <PaulFertser> diddly: when you use one as a JTAG adapter with some targets you need series termination resistors (47--100 Ohm usually) to suppress "ringing" from each signal edge.

20:39 <diddly> PaulFertser: ahh yes, thanks for the warning. I should throw together quick board with a 2x5 header and some Rs then. Would you put them closer to the ftdi or target, or both?

20:39 <PaulFertser> diddly: and also if it's a raw breakout with 0.11.0 and newer for SWD mode you can simply connect TDI and TDO without resistor (swd-resistor-hack.cfg is still appropriate for that)

20:40 <PaulFertser> diddly: typical JTAG adapter has those resistors on each data line reasonably close to a fast-speed buffer connected to FTDI chip. As FTDI has very narrow band of allowed Vccio (2.7--3.6 V iirc), so you can't do 1.8 V without a buffer.

20:42 <PaulFertser> diddly: you can take a look at TUMPA if you need some reasonably cheap and capable FTDI-based adapter. But it's a board without casing, and SWD is implemented in a lame way (resistor hack directly to ftdi) on it.

20:45 <PaulFertser> (you can 3d print a suitable case of course)

20:45 <PaulFertser> see you later