_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://libera.irclog.whitequark.org/litex
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<zeromips> Hi. I am building litex for colorlight i9, works excellent so far. Now I want to user ethernet but timing seems off: Warning: Max frequency for clock '$glbnet$eth_clocks0_rx$TRELLIS_IO_IN': 60.11 MHz (FAIL at 125.00 MHz)
<zeromips> Is thisn to expected? Or are there some additional requirements for the tools?
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<zeromips> When I test the design I see that the board is answering requests on port 1234 but litex-server says socket timeout.
<zeromips> Ok, that seems to be a firewall issue. Wireshark sees replies coming from the board.
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