mmind00 changed the topic of #linux-rockchip to: Rockchip development discussion | public log at https://libera.irclog.whitequark.org/linux-rockchip
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<linkmauve> I’ve been testing Weston on the rk3568, but I get a weird bug where surfaces often are partially displayed, per-frame, as if only the top of the surface would get displayed and the bottom keeps the contents of the buffer below.
<linkmauve> It happens even for surfaces which can and are scanned out, in which case they quickly alternate between being composited in a half-finished state, and being scanned out.
<linkmauve> I’ve been testing Gstreamer, Alacritty, Epiphany, all of them exhibit this bug.
<linkmauve> I’m not too sure where the bug happens, maybe something like Panfrost not doing the right synchronisation in its dmabuf export or import?
<linkmauve> Is this something you see on other Rockchip platforms, or maybe on other Panfrost GPUs?
<linkmauve> I also found that gst-play-1.0 uses a non-opaque format even though its contents are fully opaque…
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<diederik> do you get the same issue(s) when using sway?
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<linkmauve> I believe Sway doesn’t support scanout of windowed surfaces.
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<macromorgan> Kwiboo: I can't test the 12GB device anymore... I bricked it last night trying to define all the GPIOs without schematics :-(
<macromorgan> Kwiboo: For dram_init_banksize() should we instead be using the values from the atags to create our RAM banks instead of simply hard coding it as 0x200000 to 0xeffffff (whatever) and then a second bank for the rest?
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<qschulz> macromorgan: that's what I would do yes
<qschulz> we probably need the fallback if for some reason the atags is non-existent or malformed
<macromorgan> yes, agree
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<Kwiboo> macromorgan: ouch regarding your 12GB device, regarding dram we could do it like vendor-u-boot: first look at atags, fall back on os reg: https://github.com/rockchip-linux/u-boot/blob/next-dev/arch/arm/mach-rockchip/param.c#L290-L293
<Kwiboo> but what I noticed was inconsistency in how the ddr blobs represent the banks, so I would not fully trust them on all devices / socs
<Kwiboo> on rk356x: 4gb is reported as 2 banks with a gap for hw regs, however, 8gb only report a single bank that includes hw regs range see, https://gist.github.com/Kwiboo/6d983693c79365b43c330eb3191cbace
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<macromorgan> nice... by which I mean boo
<macromorgan> hmm... is there anything special about that 8GB device that we can take into account? Older RAM init code perhaps?
<macromorgan> it looks like we always need to start at 0x200000 instead of 0 no matter what the ATAGS say, and we also always need a hole at 0xeffffff to 0x10000000 (or whatever the addresses are) no matter what the atags say. Would that work for a workflow?
<Kwiboo> this was with latest ddr blob and same on two different devices, rk3566 and rk3588, so not anything special of identifiable
<macromorgan> damn
<macromorgan> maybe add atag parsing and guard it with a CONFIG option selected by the board?
<qschulz> are we sure this one single bank on 8gb device is not working?
<Kwiboo> I guess technically it is correct, for the 4gb there is a gap in addressable memory, and on 8gb the soc can only address memory up to 8gb, and a resarvation should be added for the hw reg range
<qschulz> and if the atags are really incorrect, does downstream u-boot do something about it?
<qschulz> if not, then we "just" need to tell Rockchip to fix their blob
<macromorgan> or open source the blob and let us do it...
<Kwiboo> downstream u-boot will add following banks for linux on a 8gb rk3566 board (odroid-m1s): bank: 0x00200000 - 0x08400000 (size: 0x08200000), 0x09400000 - 0xf0000000 (size: 0xe6c00000) and 0x100000000 - 0x200000000 (size: 0x100000000)
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<qschulz> Kwiboo: and I assume this is the same board that has this one single bank reported by atags?
<macromorgan> hmm... I guess why does it need that hole if ATAGs don't say you need that hole.
<macromorgan> I'm not questioning you, just curious
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<Kwiboo> qschulz: it should be, those ranges are same on multiple boot log pastes, but let me double check on an actual odroid-m1s
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<Kwiboo> macromorgan: the hole at 0x08400000 - 0x09400000 is because of rk optee, and 0xf0000000 - 0x100000000 is used to access hw regs
<macromorgan> okay... so in theory if you have no Optee you don't need the hole?
<macromorgan> (not that you can get Optee working with upstream U-Boot anyway... can you?)
<Kwiboo> the 0xf0000000 - 0x100000000 hole I expect is always needed as those addresses goes to hw regs and not memory
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<Kwiboo> you can get optee loaded on mainline u-boot, binman just expects the blob in elf format, binman will be happy and TF-A will happily load/run it if you first objcopy the optee blob into an elf
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<macromorgan> yes, I'm assuming the first hole from 0 to 0x200000 is always needed, and the hole from 0xf0000000 - 0x100000000 is also always needed.
<macromorgan> I guess I'm trying to figure out if there's a series of rules where we can always say "do these things and you can use the ATAG values"
<qschulz> the 0xf00-0x1000 hole seems reasonable on rk3588(s) yes
<qschulz> there;s also a hole needed for some pcie3 regs
<macromorgan> like always reserve the first bits for A-TF, always reserve the hole for periphrerials, and then also add any holes identified by atags
<qschulz> 900000000 - 0xa413fffff seems like another hole we should have
<qschulz> PCIe3_4L_S to PCIe3_1L2_DBI + 4MiB
<Kwiboo> macromorgan: that should probably work fine, there is also an optee tag that should report the memory rk optee would use if we care about that at all ;-)
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<Kwiboo> qschulz: do we know if more then 32gb ram could be used on rk3588(s)?, based on dumps of ddr atags there was no extra 256MiB range that compensate for hw regs on 32gb model: https://gist.github.com/Kwiboo/1c020d37e3adbc9d0d79dc003d921977
<qschulz> Kwiboo: datasheet says 32GB max
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<Kwiboo> qschulz: if 32gb is max I guess we can safely ignore the 900000000+ (36GiB) addresses used for pcie
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<Kwiboo> was also able to run mainline and vendor u-boot on my odroid-m1s 8gb board, the atags report 1 bank of 0-8 GiB, so vendor u-boot will skip the 0xf000-0x1000 range: boot logs at https://gist.github.com/Kwiboo/c0d0cfc36e19a15f071a3dc526c427af
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<macromorgan> so I guess getting back to a way to logically describe the behavior... could we create the banks then in such a manner where: if atags present and magic good and there is a hole between 0xF0000000 and 0x100000000 then use the atags else use old logic; if using atags and bank0 < 0x200000 make it start at 0x200000
<macromorgan> or should we instead copy the atags verbatum (if it starts at 0 for bank0) and mark the memory with a reserved node?
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