09:33 <mort> does anyone know what happened to the rockchip-linux github org?

09:34 <mort> or, why certain repos were deleted I mean; such as the tools repo

10:10 <CounterPumpkin> They updated some stuff recently, namely kernel and rkbin, they might've done a spring cleaning in the process

19:05 <CounterPumpkin> macromorgan: did you see someone's post on the mailing list about dsi troubles?

19:09 <macromorgan> yes, I responded. It's an unset PLL_VPLL clock most likely (if you don't set it, it runs at 24MHz)

19:09 <macromorgan> pixel clock on the Pi panel is ~26MHz. So need to set PLL_VPLL to a supported frequency that has a factor very close to the pixel clock of the panel and that should fix it

19:10 <macromorgan> happens on mainline because mainline is forbidden to change the parent clock, while the BSP driver has no such restriction

19:11 <macromorgan> This is the root cause: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/clk/rockchip/clk-rk3568.c?id=ff3187eabb5ce478d15b6ed62eb286756adefac3

19:12 <macromorgan> I tried to roll that back and was told it's not broken, since you shouldn't be able to change a PLL clock like that... was told the correct solution was to hard code the PLL_VPLL rate so that's what I do (and what needs to be done here)

19:12 <CounterPumpkin> yeah I generally agree with that commit's reasoning

19:14 <macromorgan> yep... I have no opinion one way or the other, as a novice I just do what I'm told by the big boys and girls ;-)