2021-06-29 16:00
ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion
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macromorgan >
so playing around on my RK3566 DSI panel, I noticed that the clk_set_rate(vp->dclk, clock) claims to be setting the dclk to the pixel clock of my panel and returns 0.
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macromorgan >
however
01:41
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macromorgan >
when I go to then check the clock rate it's at 24MHz and not my panel's pixel clock rate of 33.5MHz... any reason why that would be?
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macromorgan >
I'm just curious why I'm getting a return of 0 but it's not setting the clock
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smaeul >
what dows clk_round_rate() return? is the clock rate protected?
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smaeul >
or maybe some leaf clock is missing CLK_SET_RATE_PARENT
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smaeul >
so 24 MHz is still the best available rate
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macromorgan >
I guess I can add it back and see what happens...
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macromorgan >
still doesn't work, but I'm starting to think the DSI problems on the rk356x series I'm having are clock related...
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