08:23 <narmstrong> lvrp16: I haven't, can you dump the /sys/kernel/debug/dri/*/state ?

08:24 <narmstrong> It could either be RAM BW saturation and/or too long delays from the vsync irq

14:39 <cphealy> I've seen similar issues due to display IP FIFO underruns due to DRAM bandwidth issues. IIRC, the more recent vendor kernels have a proper perf PMU driver for the Amlogic DMC that could be used to look at what's going on DRAM bandwidth wise.

19:58 <lvrp16> narmstrong cphealy: thanks, the flickering gets worst as I run benchmarks. I'll do further testing. but it's pretty fast/awesome.

19:59 <lvrp16> 200+ fps in benchmarks at 1080p...

20:05 <cphealy> lvrp16: Which specific Amlogic SoC are you working with ?

20:06 <lvrp16> S905X

20:06 <lvrp16> cphealy: the DDR4 is clocked at 1200MHz so it may be some other issue. I'll have to do further testing.

20:06 <cphealy> The FPS for graphics benchmark is likely orthogonal with this particular issue as from my experience, display FIFO underrun type issues such as this are a function of a combination of available DRAM bandwidth AND bus QoS priority.

20:07 <cphealy> I don't know what DRAM QoS bus priority dials exist with these SoCs, but display IP should be pretty high in priority. (Higher than GPU for sure.)

20:08 <lvrp16> cphealy: I'll do more testing. Maybe the VOP isn't fast enough to push 2 4K planes in time.

20:08 <cphealy> lvrp16: are you using vendor kernel or mainline?

20:09 <lvrp16> cphealy: everything mainline

20:09 <cphealy> ack

20:09 <cphealy> With vendor kernel, there are some DRAM bandwidth sysfs entries but these are not available with mainline.

20:10 <cphealy> Do you have AFBC enabled between GPU and display IP?

20:10 <cphealy> "cat /sys/kernel/debug/dri/0/framebuffer" should point to if you have buffer modifiers enabled or not.

20:11 <cphealy> If you don't have AFBC enabled, your display DRAM bandwidth requirements will be "significant" with 4K60 display.

20:13 <cphealy> significant like 2GB/sec. With AFBC working correctly, a typical GUI will be <500MB/sec. (The compression ratio is a function of the framebuffer complexity. Solid black background = great compression ratio. Picture of movie action scene = not so great compression ratio.

20:15 <lvrp16> cphealy: doesn't look like it: https://pastebin.com/k7EtSUsi

20:16 <cphealy> Yep, you have AFBC disabled: modifier=0x0

20:17 <cphealy> With the Amlogic SoCs I've worked with, the AFBC decoder in display IP only support graphics buffers up to 1080p as Amlogic expects graphics to be 1080p and video to be 4K.

20:19 <lvrp16> cphealy: DDR4 at 2400MT is almost 8GB/s, per plane is 2GB/s or are you assuming 2 planes?

20:19 <lvrp16> cphealy: this is on top of weston, so I'm assuming weston doesn't support Amlogic AFBC?

20:20 <lvrp16> i pegged the CPU clock as well to prevent some DVFS interference

20:22 <cphealy> My understanding is that it's more complex than graphics plane requires 2GB/s and we have 8GB/s so we should be good. 8GB/s may be the "theoretical" total available, but in real world use cases, one typically gets 66-75% of theoretical.

20:23 <cphealy> Additionally, regardless of the total throughput capability of the DRAM interface, there are likely other constraints in the system that would prevent individual IP cores from achieving a throughput that high. For example, if the realizable throughput of the DRAM interface were 6GB/s, that doesn't mean the video decoder can use as much as 5GB/s. The video decoder (or display planes) may have other

20:23 <cphealy> limitations.

20:24 <cphealy> With Weston, AFBC should work, but you may need to force BGR instead of RGB for it to work.

20:24 <lvrp16> cphealy: ahhh that's useful information, I'll give that a try

20:24 <cphealy> You may want to try changing the gbm-format in weston.ini

20:25 <cphealy> Also, check the output of "modetest" with the DRM/KMS device to see what modifiers it advertises support for.

20:25 <lvrp16> cphealy: yeah i thought maybe the display IP might not be able to handle the bandwidth of 2 planes as the normal setup for Android seems to be only 1 4k plane and a bunch of 1080p planes

20:29 <lvrp16> cphealy: standard memset: 5802.5 MB/s out of 9600 MB/s so ~60%

20:42 <cphealy> lvrp16: IIRC, even when the Amlogic SoC has 3 OSD planes, not all of them will necessarily support AFBC

20:42 <cphealy> Looks like I was being generous mentioning 66-75% ;-)

20:47 <lvrp16> cphealy: it's also driving 2 planes on 1080p so you're probably right on.