whitequark[cis] changed the topic of #glasgow to: https://glasgow-embedded.org · digital interface explorer · https://www.crowdsupply.com/1bitsquared/glasgow · code https://github.com/GlasgowEmbedded/glasgow · logs https://libera.irclog.whitequark.org/glasgow · matrix #glasgow-interface-explorer:matrix.org · discord https://1bitsquared.com/pages/chat
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<megabobster[m]> glasgow arrived today and the supervisor is pleased
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<whitequark[m]> kbity
<purdeaandrei[m]> Okay, so I figured this out: If both generated_cs and generated_sck paths have the same number of combinational processes on them, then it will always sample the new value
<purdeaandrei[m]> if generated_cs has more combinational processes on them, then it will sample the old value
<purdeaandrei[m]> the reason it sampled the old value on the QSPI test is because the CS line is inverted
<purdeaandrei[m]> the inversion is caused by the ~ operator here:
<purdeaandrei[m]> which sets the inverted attribute on SimulationPort
<purdeaandrei[m]> All forms of simulation buffers use class Buffer as an end stage (after the flipflops)
<purdeaandrei[m]> And Buffer is what looks at the inverted attribute on elaboration:
<purdeaandrei[m]> So for this reason the cs line has an extra delay cycle on it , and this is why, if I do .negedge(sck.o).sample(cs.o) I see the old value
<purdeaandrei[m]> So it isn't strictly non-deterministic, since the order in which processes run will not affect the result
<whitequark[m]> yes, this all seems accurate
<purdeaandrei[m]> however it does depend on the number of combinatorial processes, which I would consider undesirable.
<purdeaandrei[m]> so I'll refactor it a bit
<whitequark[m]> yes. which is why I'm careful about saying that it's deterministic, for any given netlist
<whitequark[m]> if you change the netlist, even equivalently in some cases, you may get different scheduling
<purdeaandrei[m]> Yes, makes sense!
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<axiesmoothie[m]> re bga nand flash dumping:... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/YvZhpBZiwmZbtKmkkwHqlSCN>)
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<fishmonger[m]> I ordered three different versions of those from Ali a few months ago just to have in the toolbox. Intended to use them for in-circuit dumping, but I suppose going directly to BGA pads might work. Seems a bit fiddly though.
<axiesmoothie[m]> It does but what other choice do you have eeh
<axiesmoothie[m]> Good to know you have experience with those
<fishmonger[m]> Would not say I have experience. I own them and have opened the boxes just to get a feel for how exact the needles can be positioned. That's it. 🙂
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<lle_bout[m]> can you mesure the diameter of the needles?
<fishmonger[m]> Let me see if I can go find them. The lab is currently being remodeled and things are in unmarked boxes. BRB
<lle_bout[m]> fishmonger (@_discord_281879542476439552:catircservices.org) for incircuit measurements this could be more fitting: https://sensepeek.com/ - I own those but there are too many pins to connect for bga nand chip dumping
<lle_bout[m]> and they are too bulky but while in use they are quite stable
<lle_bout[m]> same XD no worries, thanks
<lle_bout[m]> I just would like to know how precise they can be
<fishmonger[m]> So the answer is no, can't find them right now. Will try to remember to get back next week. (On the upside I found 2 SAS cards I don't remember buying)
<lle_bout[m]> The chip I'm dealing with has 0.5mm center to center BGA ball spacing
<lle_bout[m]> No worries
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<_whitenotifier-1> [glasgow] purdeaandrei opened pull request #690: Improve QSPI tests - https://github.com/GlasgowEmbedded/glasgow/pull/690
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<timbhanson[m]> Apologies if this isn’t the right place but has anyone used the qspi applet in repl and gotten a full 4 bit bus working? I’m having trouble getting the repl to even generate clocks but the applet in run mode works just fine but only as a single bit wide spi controller.
<_whitenotifier-1> [glasgow] purdeaandrei opened pull request #691: gateware.qspi.QSPIController: fix multi-chip operation - https://github.com/GlasgowEmbedded/glasgow/pull/691
<timbhanson[m]> Went through and ran help on the iface object in the repl and think I ran writes, reads and exchanges and none of those wiggle the clock or data pins
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<Attie[m]> did you use `await`?
<purdeaandrei[m]> can you give an example of how you're driving it?
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<purdeaandrei[m]> Also try running with "glasgow -v" you might get a message that would clear up why it isn't working
<timbhanson[m]> Sure, run the repl with this... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/wvrVcBQOllengIQRBCxoJGRq>)
<timbhanson[m]> No errors but clocks doesn’t seem to wiggle. If I replace repl with run and add some data it does work but only in standard single bit wide spi mode
<purdeaandrei[m]> can you run it with glasgow -v repl qspi-controller —port A -V 3.3 —pin-sck 0 —pins-io 1,2,3,4 ?
<purdeaandrei[m]> Also, no --pin-cs? it will use the default if you don't specify it
<timbhanson[m]> That’s fine, I’m just running into a scope currently
<purdeaandrei[m]> you may need to call await iface.select()
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<purdeaandrei[m]1> Matrix > Discord message firwarding is currently down
<purdeaandrei[m]1> <Attie[m]> "did you use `await`?" <- Your message wasn't seen
<purdeaandrei[m]1> Anyway they are using await
<timbhanson[m]> Ran with -v gives ```
<timbhanson[m]> D: glasgow.applet.interface.qspi_controller: QSPI: write=<fe00>
<timbhanson[m]> ```
<timbhanson[m]> If I run ```iface.select() ``` then write still get the same
<timbhanson[m]> Await doesn’t work on the select function
<purdeaandrei[m]> sorry, try await iface.select(1)
<purdeaandrei[m]> umm, no, I'm wrong
<purdeaandrei[m]> iface.select() or iface.select(0) should do it
<purdeaandrei[m]> * await iface.select() or await iface.select(0) should do it
<purdeaandrei[m]> if you don't select any chip IOClocker goes into bypass mode
<purdeaandrei[m]> * ~~sorry, try `await iface.select(1)`~~
<timbhanson[m]> Weird, I get asyncgeneratorcontextmanager can’t be used with await operation if I use await on the select function
<timbhanson[m]> But without await it returns a async generator context manager object
<timbhanson[m]> I can transcribe the full error if it’s helpful but my desktop doesn’t have internet so copying to my phone manually
<purdeaandrei[m]> try this:
<purdeaandrei[m]> async with iface.select(0):
<purdeaandrei[m]> await iface.write([0xFE, 0x00], x=4)
<purdeaandrei[m]> I missed the @contextlib.asynccontextmanager decorator when I looked at the code
<timbhanson[m]> That did something!
<timbhanson[m]> Let me check the data lines but got correct number of clocks
<timbhanson[m]> Awesome! That works now
<timbhanson[m]> What clued you into the “with” block being required?
<timbhanson[m]> Apologies, not super up on python programming patterns but stared at the code for a minute and couldn’t make heads or tails of it beyond what functions were available in the repl
<SnoopJ> the "context manager" bit, probably. the `with` keyword expresses "I want to enter the context manager in this block, and I want to exit the context manager when this block ends"
<purdeaandrei[m]> I was familiar with the concept of context manager, when I saw the error I figured it out. Basicly it's a python feature that allows you to wrap some code, and have some stuff run before, and after the wrapped code. And the way it's implemented with `try` `finally`, basically it deselects the chip even if you leave the `with` block via an exception
<timbhanson[m]> Awesome, that clears it up
<timbhanson[m]> Thanks
<timbhanson[m]> Is there support in the qspi controller for inverted cs by chance? I don’t see anything in the applet arguments about it
<purdeaandrei[m]> CS is active low, and I think that's currently hardcoded
<purdeaandrei[m]> see here
<purdeaandrei[m]> if you just need a quick hack edit that =~ to just =
<purdeaandrei[m]> for active-high CS
<purdeaandrei[m]> (that is in /software/glasgow/gateware/qspi.py)
<mwkmwkmwk[m]> there is inverted-everything support in glasgow
<mwkmwkmwk[m]> by prepending... I think ! to the pin on the command line?
<purdeaandrei[m]> oh, nice to know!
<mwkmwkmwk[m]> oh, no
<mwkmwkmwk[m]> append # to pin
<mwkmwkmwk[m]> there you go
<timbhanson[m]> Wow, that’s super cool
<timbhanson[m]> Thanks
<timbhanson[m]> You guys really did a great job on the project, I just got my glasgow box a few days ago and in that short time I can tell it’s going to be indispensable for me
<_whitenotifier-1> [glasgow] purdeaandrei opened pull request #692: manual: describe pin inversion feature - https://github.com/GlasgowEmbedded/glasgow/pull/692
<_whitenotifier-1> [glasgow] purdeaandrei commented on pull request #692: manual: describe pin inversion feature - https://github.com/GlasgowEmbedded/glasgow/pull/692#issuecomment-2346941677
<purdeaandrei[m]> feels like this should be in the manual, so added a PR here: https://github.com/GlasgowEmbedded/glasgow/pull/692
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<_whitenotifier-1> [glasgow] purdeaandrei opened pull request #693: test_iostream: refactor SDR input sample test so it can be reused - https://github.com/GlasgowEmbedded/glasgow/pull/693
<_whitenotifier-1> [glasgow] purdeaandrei commented on pull request #684: Reapply IOStreamer DDR sampling fix, and also fix QSPI - https://github.com/GlasgowEmbedded/glasgow/pull/684#issuecomment-2347080779
<_whitenotifier-1> [glasgow] purdeaandrei commented on pull request #678: IOstreamer sample lost bugfix - https://github.com/GlasgowEmbedded/glasgow/pull/678#issuecomment-2347081390
<_whitenotifier-1> [glasgow] purdeaandrei commented on pull request #675: gateware.iostream.IOStreamer: let o_stream transfer if i_stream not rdy - https://github.com/GlasgowEmbedded/glasgow/pull/675#issuecomment-2347082052
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